A Novel CMOS Full Adder. - Keivan Navi; Omid Kavehei; Mahnoush Rouholamini; Amir Sahafi; Shima Mehrabi (VLSI Design, 2007)

Low-Power and High-Performance 1-Bit CMOS Full-Adder Cell. - Keivan Navi; Omid Kavehei; Mahnoush Rouholamini; Amir Sahafi; Shima Mehrabi; Nooshin Dadkhahi (J. Comput., 2008)

Design, analysis, and implementation of partial product reduction phase by using wide m: 3 (4 ≤ m ≤ 10) compressors. - Shima Mehrabi; Reza Faghih Mirzaee; Sharareh Zamanzadeh; Keivan Navi; Omid Hashemipour (Int. J. High Perform. Syst. Archit., 2013)