A String-in-string-out 256 Bits eFuse Using Full-custom Design in 55nm Process. - Yang Li; Yuejun Zhang; Steve Yang; Shimin Du; Ye Lin (ASICON, 2021)

A Three-valued Adder Circuit Implemented in ZnO Memristor with Multi-resistance States. - Zhixin Wu; Yuejun Zhang; Shimin Du; Zhecheng Guo; Wanlong Zhao (ASICON, 2021)

A stable voltage island-driven floorplanning with fixed-outline constraint for low power SoC. - Shimin Du; Runping Yang; Yuejun Zhang; Yu Shenglu (Microelectron. J., 2022)

An RSC-Based Genetic Algorithm for Fixed-Outline Soft Module Floorplanning. - Runping Yang; Shimin Du (Int. J. Pattern Recognit. Artif. Intell., 2024)