An experimental large-capacity semiconductor file memory using 16-levels/cell storage. - Masashi Horiguchi; Masakazu Aoki; Yoshinobu Nakagome; Shin'ichi Ikenaga; Katsuhiro Shimohigashi (IEEE J. Solid State Circuits, 1988)

New DRAM noise generation under half-Vcc precharge and its reduction using a transposed amplifier. - Masakazu Aoki; Shin'ichi Ikenaga; Yoshinobu Nakagome; Masashi Horiguchi; Yasushi Kawase; Yoshifumi Kawamoto; Kiyoo Itoh 001 (IEEE J. Solid State Circuits, 1989)

A tunable CMOS-DRAM voltage limiter with stabilized feedback amplifier. - Masashi Horiguchi; Masakazu Aoki; Jun Etoh; Hitoshi Tanaka; Shin'ichi Ikenaga; Kiyoo Itoh 001; Kazuhiko Kajigaya; Hiroaki Kotani; Kazuyoshi Ohshima; Tetsuro Matsumoto (IEEE J. Solid State Circuits, 1990)