A 60-ns 3.3-V-only 16-Mbit DRAM with multipurpose register. - Kazutami Arimoto; Kazuyasu Fujishima; Yoshio Matsuda; Masaki Tsukude; Tukasa Oishi; Wataru Wakamiya; Shin'ichi Satoh 004; Michihiro Yamada; Takao Nakano (IEEE J. Solid State Circuits, 1989)