A Process Variation Tolerant Embedded Split-Gate Flash Memory Using Pre-Stable Current Sensing Scheme. - Meng-Fan Chang; Shin-Jang Shen (IEEE J. Solid State Circuits, 2009)

An offset-tolerant current-sampling-based sense amplifier for Sub-100nA-cell-current nonvolatile memory. - Meng-Fan Chang; Shin-Jang Shen; Chia-Chi Liu; Che-Wei Wu; Yu-Fan Lin; Shang-Chi Wu; Chia-En Huang; Han-Chao Lai; Ya-Chin King; Chorng-Jung Lin; Hung-Jen Liao; Yu-Der Chih; et al. (ISSCC, 2011)

A 0.5V 4Mb logic-process compatible embedded resistive RAM (ReRAM) in 65nm CMOS using low-voltage current-mode sensing scheme with 45ns random read time. - Meng-Fan Chang; Che-Wei Wu; Chia-Chen Kuo; Shin-Jang Shen; Ku-Feng Lin; Shu-Meng Yang; Ya-Chin King; Chorng-Jung Lin; Yu-Der Chih (ISSCC, 2012)

An Offset-Tolerant Fast-Random-Read Current-Sampling-Based Sense Amplifier for Small-Cell-Current Nonvolatile Memory. - Meng-Fan Chang; Shin-Jang Shen; Chia-Chi Liu; Che-Wei Wu; Yu-Fan Lin; Ya-Chin King; Chorng-Jung Lin; Hung-Jen Liao; Yu-Der Chih; Hiroyuki Yamauchi (IEEE J. Solid State Circuits, 2013)

A Low-Voltage Bulk-Drain-Driven Read Scheme for Sub-0.5 V 4 Mb 65 nm Logic-Process Compatible Embedded Resistive RAM (ReRAM) Macro. - Meng-Fan Chang; Che-Wei Wu; Chia-Chen Kuo; Shin-Jang Shen; Sue-Meng Yang; Ku-Feng Lin; Wen-Chao Shen; Ya-Chin King; Chorng-Jung Lin; Yu-Der Chih (IEEE J. Solid State Circuits, 2013)

An Asymmetric-Voltage-Biased Current-Mode Sensing Scheme for Fast-Read Embedded Flash Macros. - Meng-Fan Chang; Yu-Fan Lin; Yen-Chen Liu; Jui-Jen Wu; Shin-Jang Shen; Wu-Chin Tsai; Yu-Der Chih (IEEE J. Solid State Circuits, 2015)

Layer-Aware Program-and-Read Schemes for 3D Stackable Vertical-Gate BE-SONOS NAND Flash Against Cross-Layer Process Variations. - Chun-Hsiung Hung; Meng-Fan Chang; Yih-Shan Yang; Yao-Jen Kuo; Tzu-Neng Lai; Shin-Jang Shen; Jo-Yu Hsu; Shuo-Nan Hung; Hang-Ting Lue; Yen-Hao Shih; Shih-Lin Huang; Ti-Wen Chen; et al. (IEEE J. Solid State Circuits, 2015)