An energy-efficient high-level synthesis algorithm for huddle-based distributed-register architectures. - Shin-ya Abe; Masao Yanagisawa; Nozomu Togawa (ISCAS, 2012)

MH4 : multiple-supply-voltages aware high-level synthesis for high-integrated and high-frequency circuits for HDR architectures. - Shin-ya Abe; Youhua Shi; Masao Yanagisawa; Nozomu Togawa (IEICE Electron. Express, 2012)

Energy-efficient High-level Synthesis for HDR Architectures. - Shin-ya Abe; Masao Yanagisawa; Nozomu Togawa (IPSJ Trans. Syst. LSI Des. Methodol., 2012)

An energy-efficient high-level synthesis algorithm incorporating interconnection delays and dynamic multiple supply voltages. - Shin-ya Abe; Youhua Shi; Kimiyoshi Usami; Masao Yanagisawa; Nozomu Togawa (VLSI-DAT, 2013)

Floorplan Driven Architecture and High-Level Synthesis Algorithm for Dynamic Multiple Supply Voltages. - Shin-ya Abe; Youhua Shi; Kimiyoshi Usami; Masao Yanagisawa; Nozomu Togawa (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013)

Energy-efficient High-level Synthesis for HDR Architectures with Clock Gating Based on Concurrency-oriented Scheduling. - Hiroyuki Akasaka; Shin-ya Abe; Masao Yanagisawa; Nozomu Togawa (IPSJ Trans. Syst. LSI Des. Methodol., 2013)

A floorplan-aware high-level synthesis algorithm for multiplexer reduction targeting FPGA designs. - Koichi Fujiwara; Shin-ya Abe; Kazushi Kawamura; Masao Yanagisawa; Nozomu Togawa (APCCAS, 2014)

Energy-efficient High-level Synthesis for HDR Architecture with Multi-stage Clock Gating. - Hiroyuki Akasaka; Shin-ya Abe; Masao Yanagisawa; Nozomu Togawa (IPSJ Trans. Syst. LSI Des. Methodol., 2014)

An Energy-Efficient Floorplan Driven High-Level Synthesis Algorithm for Multiple Clock Domains Design. - Shin-ya Abe; Youhua Shi; Kimiyoshi Usami; Masao Yanagisawa; Nozomu Togawa (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2015)

A Floorplan-Driven High-Level Synthesis Algorithm for Multiplexer Reduction Targeting FPGA Designs. - Koichi Fujiwara; Kazushi Kawamura; Shin-ya Abe; Masao Yanagisawa; Nozomu Togawa (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2015)