A PND (PMOS-NMOS-Depletion MOS) Type Single Poly Gate Non-Volatile Memory Cell Design with a Differential Cell Architecture in a Pure CMOS Logic Process for a System LSI. - Yasue Yamamoto; Masanori Shirahama; Toshiaki Kawasaki; Ryuji Nishihara; Shinichi Sumi; Yasuhiro Agata; Hirohito Kikukawa; Hiroyuki Yamauchi (IEICE Trans. Electron., 2007)