VLSI Implementation of QRS Complex Detector Based on Wavelet Decomposition. - Yuan-Ho Chen; Chih-Wen Lu; Szi-Wen Chen; Ming-Han Tsai; Shinn-Yn Lin; Rou-Shayn Chen (IEEE Access, 2022)

A VLSI Chip for the Abnormal Heart Beat Detection Using Convolutional Neural Network. - Yuan-Ho Chen; Szi-Wen Chen; Pei-Jung Chang; Hsin-Tung Hua; Shinn-Yn Lin; Rou-Shayn Chen (Sensors, 2022)

Robust Cascaded Boost Converter with See-Saw Stress-Relief Control. - Chung-Yi Li; Tzu-Yu Chen; Deng-Fong Lu; Yue-Liang Chou; Hung-Chi Chen; Shinn-Yn Lin (ISOCC, 2023)

A Very Large-Scale Integration (VLSI) Chip Design for Abnormal Heartbeat Detection Using a Data-Shifting Neural Network (DSNN). - Yuan-Ho Chen; Szi-Wen Chen; Hong-Wen Jian; Shinn-Yn Lin; Rou-Shayn Chen (IEEE Access, 2024)

Design and Implementation of a VLSI-based Annealing Accelerator for Efficiently Solving Combinatorial Optimization Problems. - Yuan-Ho Chen; Che-An Chou; Chin-Fu Nien; Shinn-Yn Lin (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

Corrections to "A Very Large-Scale Integration (VLSI) Chip Design for Abnormal Heartbeat Detection Using a Data-Shifting Neural Network (DSNN)". - Yuan-Ho Chen; Szi-Wen Chen; Hong-Wen Jian; Shinn-Yn Lin; Rou-Shayn Chen (IEEE Access, 2025)

Low-latency and power-efficient row-based binary-weighted compensator for fixed-width Booth multiplier. - Chung-Yi Li; Hong-Chi Hu; Yuan-Ho Chen; Shinn-Yn Lin (Int. J. Circuit Theory Appl., 2025)