20.1-mW 8-Gbps UWB-IR millimeter-wave transmitter using an OOK pulse modulator based on CMOS inverters. - Shinsuke Nakano; Hiroaki Katsurai; Minoru Togashi; Hiroshi Koizumi; Masafumi Nogawa (ISCAS, 2014)

A 25-Gb/s 480-mW CMOS modulator driver using area-efficient 3D inductor peaking. - Shinsuke Nakano; Masafumi Nogawa; Hideyuki Nosaka; Akira Tsuchiya; Hidetoshi Onodera; Shunji Kimura (A-SSCC, 2015)

A 180-mW Linear MZM Driver in CMOS for Single-Carrier 400-Gb/s Coherent Optical Transmitter. - Shinsuke Nakano; Munehiko Nagatani; Kenji Tanaka; Yoshihiro Ogiso; Josuke Ozaki; Hiroshi Yamazaki; Hideyuki Nosaka (ECOC, 2017)

25-Gb/s clock and data recovery IC using latch-load combined with CML buffer circuit for delay generation with 65-nm CMOS. - Tomonori Tanaka; Kosuke Furuichi; Hiromu Uemura; Ryosuke Noguchi; Natsuyuki Koda; Koki Arauchi; Daichi Omoto; Hiromi Inaba; Keiji Kishine; Shinsuke Nakano; Masafumi Nogawa; Hideyuki Nosaka (ISCAS, 2017)

Ultra-Low Power Dissipation (<2.4 W) Coherent InP Modulator Module with CMOS Driver IC. - Josuke Ozaki; Shinsuke Nakano; Yoshihiro Ogiso; Shigeru Kanazawa; Yuta Ueda; Yasuaki Hashizume; Hiroshi Yamazaki; Hiromasa Tanobe; Eiichi Yamada; Nobuhiro Nunoya; Nobuhiro Kikuchi (ECOC, 2018)

A 137-mW, 4 ch × 25-Gbps Low-Power Compact Transmitter Flip-Chip-Bonded 1.3-μm LD-Array-on-Si. - Toshiki Kishi; Munehiko Nagatani; Shigeru Kanazawa; Shinsuke Nakano; Hiroaki Katsurai; Takuro Fujii; Hidetaka Nishi; Takaaki Kakitsuka; Koichi Hasebe; Kota Shikama; Yuko Kawajiri; Atsushi Aratake; et al. (OFC, 2018)

A 25-Gb/s 13 mW clock and data recovery using C2MOS D-flip-flop in 65-nm CMOS. - Ryosuke Noguchi; Kosuke Furuichi; Hiromu Uemura; Toshiyuki Inoue; Akira Tsuchiya; Keiji Kishine; Hiroaki Katsurai; Shinsuke Nakano; Hideyuki Nosaka (VLSI-DAT, 2018)

A wideband current-reuse-RGC TIA circuit with low-power consumption. - Akira Hida; Yusuke Nakane; Shunta Mizuno; Makoto Nakamura; Daisuke Ito; Shinsuke Nakano; Hideyuki Nosaka (IEICE Electron. Express, 2019)