Pattern-Based Systematic Task Mapping for Many-Core Processors. - Shintaro Sano; Masahiro Sano; Shimpei Sato; Takefumi Miyoshi; Kenji Kise (ICNC, 2010)

ScalableCore System: A Scalable Many-Core Simulator by Employing over 100 FPGAs. - Shinya Takamaeda-Yamazaki; Shintaro Sano; Yoshito Sakaguchi; Naoki Fujieda; Kenji Kise (ARC, 2012)

A novel energy-efficient data acquisition method for wearable devices. - Akira Takeda; Akira Yokosawa; Shintaro Sano; Shunsuke Sasaki; Takeshi Kodaka; Takahiro Tokuyoshi; Toshiki Kizu (COOL Chips, 2015)

Automatic Feature Extraction of Channel Gains of Wireless Body Area Network using Convolutional Neural Networks. - Shintaro Sano; Takahiro Aoyagi (ISMICT, 2020)

Approaching DRAM performance by using microsecond-latency flash memory for small-sized random read accesses: a new access method and its graph applications. - Tomoya Suzuki; Kazuhiro Hiwada; Hirotsugu Kajihara; Shintaro Sano; Shuou Nomura; Tatsuo Shiozawa (Proc. VLDB Endow., 2021)

Implementing and Evaluating E2LSH on Storage. - Yu Nakanishi; Kazuhiro Hiwada; Yosuke Bando; Tomoya Suzuki; Hirotsugu Kajihara; Shintaro Sano; Tatsuro Endo; Tatsuo Shiozawa (EDBT, 2023)

GPU Graph Processing on CXL-Based Microsecond-Latency External Memory. - Shintaro Sano; Yosuke Bando; Kazuhiro Hiwada; Hirotsugu Kajihara; Tomoya Suzuki; Yu Nakanishi; Daisuke Taki; Akiyuki Kaneko; Tatsuo Shiozawa (SC Workshops, 2023)