Evaluation of Applying SpecC to the Integrated Design Method of Device Driver and Device. - Shinya Honda; Hiroaki Takada (Embedded Software for SoC, 2003)

Evaluation of Applying SpecC to the Integrated Design Method of Device Driver and Device. - Shinya Honda; Hiroaki Takada (DATE, 2003)

Hardware/Software Co-Configuration for Multiprocessor SoPC. - Hiroaki Takada; Shinya Honda; Reiji Nishiyama; Hiroshi Yuyama (WSTFES, 2003)

RTOS-centric hardware/software cosimulator for embedded system design. - Shinya Honda; Takayuki Wakabayashi; Hiroyuki Tomiyama; Hiroaki Takada (CODES+ISSS, 2004)

Cosimulation of ITRON-based embedded software with SystemC. - Shin-ichiro Chikada; Shinya Honda; Hiroyuki Tomiyama; Hiroaki Takada (HLDVT, 2005)

An RTOS-Based Design and Validation Methodology for Embedded Systems. - Hiroyuki Tomiyama; Shin-ichiro Chikada; Shinya Honda; Hiroaki Takada (IEICE Trans. Inf. Syst., 2005)

NEXCESS: Nagoya university extension courses for embedded software specialists. - Masaki Yamamoto 004; Hiroyuki Tomiyama; Hiroaki Takada; Kiyoshi Agusa; Kenji Mase; Nobuo Kawaguchi; Shinya Honda; Nobuyuki Kaneko (SIGBED Rev., 2005)

Function Call Optimization in Behavioral Synthesis. - Yuko Hara; Hiroyuki Tomiyama; Shinya Honda; Hiroaki Takada (DSD, 2006)

RTOS and Codesign Toolkit for Multiprocessor Systems-on-Chip. - Shinya Honda; Hiroyuki Tomiyama; Hiroaki Takada (ASP-DAC, 2007)

Complexity-constrainted partitioning of sequential programs for efficient behavioral synthesis. - Yuko Hara; Hiroyuki Tomiyama; Shinya Honda; Hiroaki Takada; Katsuya Ishii (ACM Great Lakes Symposium on VLSI, 2007)

A Hardware/Software Cosimulator with RTOS Supports for Multiprocessor Embedded Systems. - Takashi Furukawa; Shinya Honda; Hiroyuki Tomiyama; Hiroaki Takada (ICESS, 2007)

Behavioral Synthesis of Double-Precision Floating-Point Adders with Function-Level Transformations: A Case Study. - Yuko Hara; Hiroyuki Tomiyama; Shinya Honda; Hiroaki Takada; Katsuya Ishii (ICESS, 2007)

Function Call Optimization for Efficient Behavioral Synthesis. - Yuko Hara; Hiroyuki Tomiyama; Shinya Honda; Hiroaki Takada (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007)

Function-Level Partitioning of Sequential Programs for Efficient Behavioral Synthesis. - Yuko Hara; Hiroyuki Tomiyama; Shinya Honda; Hiroaki Takada; Katsuya Ishii (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007)

Practice and analysis of an extension course for training trainers of embedded software. - Masaki Yamamoto 004; Shinya Honda; Hiroaki Takada; Kiyoshi Agusa; Hiroyuki Tomiyama; Kenji Mase; Nobuo Kawaguchi; Nobuyuki Kaneko (SIGBED Rev., 2007)

CHStone: A benchmark program suite for practical C-based high-level synthesis. - Yuko Hara; Hiroyuki Tomiyama; Shinya Honda; Hiroaki Takada; Katsuya Ishii (ISCAS, 2008)

Free Energy Landscape Analysis System Based on Parallel Molecular Dynamics Simulation. - Masakazu Sekijima; Junta Doi; Shinya Honda; Tamotsu Noguchi; Shigenori Shimizu; Yutaka Akiyama (Inf. Media Technol., 2008)

Embedded System Covalidation with RTOS Model and FPGA. - Seiya Shibata; Shinya Honda; Yuko Hara; Hiroyuki Tomiyama; Hiroaki Takada (IPSJ Trans. Syst. LSI Des. Methodol., 2008)

ProSeg: a database of local structures of protein segments. - Yoshito Sawada; Shinya Honda (J. Comput. Aided Mol. Des., 2009)

Proposal and Quantitative Analysis of the CHStone Benchmark Program Suite for Practical C-based High-level Synthesis. - Yuko Hara; Hiroyuki Tomiyama; Shinya Honda; Hiroaki Takada (J. Inf. Process., 2009)

Aggressive Register Unsharing Based on SSA Transformation for Clock Enhancement in High-Level Synthesis. - Toshinobu Matsuba; Yuko Hara; Hiroyuki Tomiyama; Shinya Honda; Hiroaki Takada (DELTA, 2010)

A Novel Mechanism for Effective Hardware Task Preemption in Dynamically Reconfigurable Systems. - Krzysztof Jozwik; Hiroyuki Tomiyama; Shinya Honda; Hiroaki Takada (FPL, 2010)

Automatic communication synthesis with hardware sharing for design space exploration. - Yuki Ando; Seiya Shibata; Shinya Honda; Hiroyuki Tomiyama; Hiroaki Takada (ISCAS, 2010)

Automatic Communication Synthesis with Hardware Sharing for Multi-Processor SoC Design. - Yuki Ando; Seiya Shibata; Shinya Honda; Hiroyuki Tomiyama; Hiroaki Takada (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010)

Partitioning of Behavioral Descriptions with Exploiting Function-Level Parallelism. - Yuko Hara; Hiroyuki Tomiyama; Shinya Honda; Hiroaki Takada (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010)

Efficient Design Space Exploration at System Level with Automatic Profiler Instrumentation. - Seiya Shibata; Yuki Ando; Shinya Honda; Hiroyuki Tomiyama; Hiroaki Takada (IPSJ Trans. Syst. LSI Des. Methodol., 2010)

Fast design space exploration for mixed hardware-software embedded systems. - Yuki Ando; Seiya Shibata; Shinya Honda; Hiroyuki Tomiyama; Hiroaki Takada (ISOCC, 2011)

Hardware multitasking in dynamically partially reconfigurable FPGA-based embedded systems. - Krzysztof Jozwik; Hiroyuki Tomiyama; Masato Edahiro; Shinya Honda; Hiroaki Takada (ISOCC, 2011)

Rainbow: An OS Extension for Hardware Multitasking on Dynamically Partially Reconfigurable FPGAs. - Krzysztof Jozwik; Hiroyuki Tomiyama; Masato Edahiro; Shinya Honda; Hiroaki Takada (ReConFig, 2011)

Selective Resource Sharing with RT-Level Retiming for Clock Enhancement in High-Level Synthesis. - Yuko Hara-Azumi; Toshinobu Matsuba; Hiroyuki Tomiyama; Shinya Honda; Hiroaki Takada (HPCC-ICESS, 2012)

An Open-Source Flexible Scheduling Simulator for Real-Time Applications. - Yutaka Matsubara; Yasumasa Sano; Shinya Honda; Hiroaki Takada (ISORC, 2012)

Reliable Device Sharing Mechanisms for Dual-OS Embedded Trusted Computing. - Daniel Sangorrín; Shinya Honda; Hiroaki Takada (TRUST, 2012)

Convergent evolution in structural elements of proteins investigated using cross profile analysis. - Kentaro Tomii; Yoshito Sawada; Shinya Honda (BMC Bioinform., 2012)

Comparison of Preemption Schemes for Partially Reconfigurable FPGAs. - Krzysztof Jozwik; Hiroyuki Tomiyama; Masato Edahiro; Shinya Honda; Hiroaki Takada (IEEE Embed. Syst. Lett., 2012)

A Novel Framework for Effective Preemptive Hardware Multitasking on FPGAs. - Krzysztof Jozwik; Hiroyuki Tomiyama; Shinya Honda; Hiroaki Takada (IEICE Trans. Inf. Syst., 2012)

Integrated Scheduling for a Reliable Dual-OS Monitor. - Daniel Sangorrín; Shinya Honda; Hiroaki Takada (Inf. Media Technol., 2012)

A Fast Performance Estimation Framework for System-Level Design Space Exploration. - Seiya Shibata; Yuki Ando; Shinya Honda; Hiroyuki Tomiyama; Hiroaki Takada (IPSJ Trans. Syst. LSI Des. Methodol., 2012)

Automated Identification of Performance Bottleneck on Embedded Systems for Design Space Exploration. - Yuki Ando; Seiya Shibata; Shinya Honda; Hiroyuki Tomiyama; Hiroaki Takada (IESS, 2013)

Android Platform Based on Vehicle Embedded Data Stream Processing. - Yukikazu Nakamoto; Masanori Okamoto; Mohanmed Bhuiya; Akihiro Yamaguchi; Kenya Sato; Shinya Honda; Hiroaki Takada (UIC/ATC, 2013)

Rainbow: An Operating System for Software-Hardware Multitasking on Dynamically Partially Reconfigurable FPGAs. - Krzysztof Jozwik; Shinya Honda; Masato Edahiro; Hiroyuki Tomiyama; Hiroaki Takada (Int. J. Reconfigurable Comput., 2013)

Reliable and Efficient Dual-OS Communications for Real-Time Embedded Virtualization. - Daniel Sangorrín; Shinya Honda; Hiroaki Takada (Inf. Media Technol., 2013)

Quantitative Evaluation of Resource Sharing in High-level Synthesis Using Realistic Benchmarks. - Yuko Hara-Azumi; Toshinobu Matsuba; Hiroyuki Tomiyama; Shinya Honda; Hiroaki Takada (IPSJ Trans. Syst. LSI Des. Methodol., 2013)

Fast Design-Space Exploration Method for SW/HW Codesign on FPGAs. - Yuki Ando; Seiya Shibata; Shinya Honda; Hiroyuki Tomiyama; Hiroaki Takada (FCCM, 2014)

Real-Time-Aware Embedded DSMS Applicable to Advanced Driver Assistance Systems. - Satoshi Katsunuma; Shinya Honda; Kenya Sato; Yousuke Watanabe; Yukikazu Nakamoto; Hiroaki Takada (SRDS Workshops, 2014)

Toward Data-Centric Software Architecture for Automotive Systems - Embedded Data Stream Processing Approach. - Yukikazu Nakamoto; Akihiro Yamaguchi; Kenya Sato; Shinya Honda; Hiroaki Takada (UIC/ATC/ScalCom, 2014)

Impact of Resource Sharing and Register Retiming on Area and Performance of FPGA-based Designs. - Yuko Hara-Azumi; Toshinobu Matsuba; Hiroyuki Tomiyama; Shinya Honda; Hiroaki Takada (IPSJ Trans. Syst. LSI Des. Methodol., 2014)

A Case Study of FPGA Blokus Duo Solver by System-Level Design. - Yuki Ando; Masataka Ogawa; Yuya Mizoguchi; Kouta Kumagai; Miaw Torng-Der; Shinya Honda (SIGARCH Comput. Archit. News, 2014)

Adaptive control for vibration suppression by using self-organization map. - Shinya Honda; Yoshihiro Narita; Naohiro Kida (ASCC, 2015)

AEDSMS: Automotive Embedded Data Stream Management System. - Akihiro Yamaguchi; Yukikazu Nakamoto; Kenya Sato; Yoshiharu Ishikawa; Yousuke Watanabe; Shinya Honda; Hiroaki Takada (ICDE, 2015)

Automatic Synthesis of Inter-heterogeneous-processor Communication for Programmable System-on-chip. - Yuki Ando; Yukihito Ishida; Shinya Honda; Hiroaki Takada; Masato Edahiro (IPSJ Trans. Syst. LSI Des. Methodol., 2015)

System-level Design Method for Control Systems with Hardware-implemented Interrupt Handler. - Yuki Ando; Shinya Honda; Hiroaki Takada; Masato Edahiro (J. Inf. Process., 2015)

A Map Database System for Route Navigation with Multiple Transit Points and Destination Points. - Kunihiko Kaneko; Shinya Honda (IIAI-AAI, 2016)

Test Program Generator for AUTOSAR OS. - Kazuto Shigihara; Shinya Honda; Hiroaki Takada (EDCC, 2017)

In-vehicle Distributed Time-critical Data Stream Management System for Advanced Driver Assistance. - Akihiro Yamaguchi; Yousuke Watanabe; Kenya Sato; Yukikazu Nakamoto; Yoshiharu Ishikawa; Shinya Honda; Hiroaki Takada (J. Inf. Process., 2017)

Efficient Approach to Ensure Temporal Determinism in Automotive Control Systems. - Masataka Ogawa; Shinya Honda; Hiroaki Takada (ISED, 2018)

Cost-Effective Redundancy Approach for Fail-Operational Autonomous Driving System. - Tasuku Ishigooka; Shinya Honda; Hiroaki Takada (ISORC, 2018)

Performance Evaluation of CAESAR Authenticated Encryption on SROS2. - Shu Takemoto; Kanata Nishida; Yusuke Nozaki; Masaya Yoshikawa; Shinya Honda; Ryo Kurachi (AICCC, 2019)

Process monitoring of deep drawing using machine learning. - Tomohiro Tsuruya; Musashi Danseko; Katsuhiko Sasaki; Shinya Honda; Ryo Takeda (AIM, 2019)

Convolution Neural Network Development Support System using Approximation Methods to Evaluate Inference Accuracy and Memory Usage in an Embedded System. - Toki Matsumoto; Yukikazu Nakamoto; Ryota Yamamoto; Shinya Honda; Kazutoshi Wakabayashi (SmartWorld/SCALCOM/UIC/ATC/CBDCom/IOP/SCI, 2019)

TZmCFI: RTOS-Aware Control-Flow Integrity Using TrustZone for Armv8-M. - Tomoaki Kawada; Shinya Honda; Yutaka Matsubara; Hiroaki Takada (Int. J. Parallel Program., 2021)