An ultra-high-density high-speed loadless four-transistor SRAM macro with a dual-layered twisted bit-line and a triple-well shield. - Kenji Noda; Koujirou Matsui; Shinya Ito; Sadaaki Masuoka; Hiroyuki Kawamoto; Nobuyuki Ikezawa; Koichi Takeda 001; Yoshiharu Aimoto; Naoto Nakamura; Hideo Toyoshima; Takahiro Iwasaki; Tadahiko Horiuchi (CICC, 2000)

An ultrahigh-density high-speed loadless four-transistor SRAM macro with twisted bitline architecture and triple-well shield. - Kenji Noda; Koichi Takeda 001; Koujirou Matsui; Shinya Ito; Sadaaki Masuoka; Hideaki Kawamoto; Nobuyuki Ikezawa; Yoshiharu Aimoto; Noritsugu Nakamura; Takahiro Iwasaki; Hideo Toyoshima; Tadahiko Horiuchi (IEEE J. Solid State Circuits, 2001)

A Self-evolutionary Emulation Scheme for A Networking Oriented Data-driven Processor Architecture: CUE. - Shinya Ito; Ryosuke Kurebayashi; Hiroaki Nishikawa (PDPTA, 2002)

Effect of mechanical stress induced by etch-stop nitride: impact on deep-submicron transistor performance. - Shinya Ito; Hiroaki Namba; Tsuyoshi Hirata; Koichi Ando; Shin Koyama; Nobuyuki Ikezawa; Tatsuya Suzuki; Takehiro Saitoh; Tadahiko Horiuchi (Microelectron. Reliab., 2002)

The Microarchitecture of the CUE-v2 Processor: Enabling the Simultaneous Processing of Dataflow and Control-Flow Threads. - Shinya Ito; Shouhei Nomoto; Hiroshi Tomiyasu; Hiroaki Nishikawa (PDPTA, 2004)

A method of digital watermarking by using the frequency masking effect. - Shinya Ito; Hiroshi Tsubokawa (Syst. Comput. Jpn., 2006)

Concept set extraction with user session context. - Hemant Joshi; Shinya Ito; Santhosh Kanala; Sangeetha Hebbar; Coskun Bayrak (ACM Southeast Regional Conference, 2007)

A Digital TV Receiver RF and BB Chipset with Adaptive Bias-Current Control for Mobile Applications. - Takae Sakai; Shinya Ito; Nobuyoshi Kaiki; Atsushi Sakai; Mamoru Okazaki; Masayuki Natsumi; Akira Saito; Kazumasa Kioi; Masato Koutani; Koutani Kagoshima; Shuichi Kawama; Hiroshi Kijima; et al. (ISSCC, 2007)

Exponentially Aggressive Preservation of Nearly Depleted Nodes for Wireless Sensor Networks. - Shinya Ito; Kenji Yoshigoe (ITNG, 2007)

Consumed-energy-type-aware routing for wireless sensor networks. - Shinya Ito; Kenji Yoshigoe (WTS, 2007)

Multi-Step Word-Line Control Technology in Hierarchical Cell Architecture for Scaled-Down High-Density SRAMs. - Koichi Takeda 001; Toshio Saito; Shinobu Asayama; Yoshiharu Aimoto; Hiroyuki Kobatake; Shinya Ito; Toshifumi Takahashi; Masahiro Nomura; Kiyoshi Takeuchi; Yoshihiro Hayashi (IEEE J. Solid State Circuits, 2011)

High-Degree Neurons Feed Cortical Computations. - Nicholas M. Timme; Shinya Ito; Maxym Myroshnychenko; Sunny Nigam; Masanori Shimono; Fang-Chin Yeh; Pawel Hottowy; Alan M. Litke; John M. Beggs (PLoS Comput. Biol., 2016)

Impact of generator failures on photovoltaic energy curtailment in power systems with large-scale integration of photovoltaic generation. - Taisuke Masuta; Shinya Ito; Daiki Kobauashi; Hideaki Ohtake (ICIIS, 2017)

Nonlinear visuoauditory integration in the mouse superior colliculus. - Shinya Ito; Yufei Si; Alan M. Litke; David A. Feldheim (PLoS Comput. Biol., 2021)

First Live Demonstration of Remote Controllable SFP28 APN-Transceiver for Mobile Fronthaul Use Cases. - Yuya Saito; Naoki Umezawa; Yasuhiro Takizawa; Manabu Kotani; Shinya Ito; Shinichi Koyama; Yasuhiro Tanaka; Daisuke Umeda (OFC, 2025)