A 3D audio coding technique based on extracting the distance parameter. - Cheng Yang; Ruimin Hu; Liuyue Su; Weiping Tu; Xiaochen Wang 001; Yuhong Yang 001; Ge Gao; Shi Dong 004; Song Wang 011; Maosheng Zhang; Furong Lei; Shiqing Li (ICME, 2014)

NVM-Based FPGA Block RAM With Adaptive SLC-MLC Conversion. - Lei Ju 001; Xiaojin Sui; Shiqing Li; Mengying Zhao; Chun Jason Xue; Jingtong Hu; Zhiping Jia (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Automatic data placement for CPU-FPGA heterogeneous multiprocessor System-on-Chips. - Shiqing Li; Yixun Wei; Lei Ju 001 (DATE, 2019)

A New Intelligent Trajectory Planning Algorithm Based on Bug2 Algorithm: Bridge Algorithm. - Shuai Yang; Xinqing Wang; Yan Wen; Jirong Wang; Shiqing Li (ROBIO, 2019)

Meta-Learning for Natural Language Understanding under Continual Learning Framework. - Jiacheng Wang; Yong Fan; Duo Jiang; Shiqing Li (CoRR, 2020)

Optimized Data Reuse via Reordering for Sparse Matrix-Vector Multiplication on FPGAs. - Shiqing Li; Di Liu 002; Weichen Liu (ICCAD, 2021)

Partial order based non-preemptive communication scheduling towards real-time networks-on-chip. - Peng Chen 027; Hui Chen 016; Jun Zhou; Di Liu 002; Shiqing Li; Weichen Liu; Wanli Chang 001; Nan Guan (SAC, 2021)

Automated detection and analysis of social behaviors among preweaning piglets using key point-based spatial and temporal features. - Haiming Gan; Mingqiang Ou; Endai Huang; Chengguo Xu; Shiqing Li; Jiping Li; Kai Liu 008; Yueju Xue (Comput. Electron. Agric., 2021)

Reduced Worst-Case Communication Latency Using Single-Cycle Multihop Traversal Network-on-Chip. - Peng Chen 027; Weichen Liu; Hui Chen 016; Shiqing Li; Mengquan Li; Lei Yang 018; Nan Guan (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

MARCO: A High-performance Task Mapping and Routing Co-optimization Framework for Point-to-Point NoC-based Heterogeneous Computing Systems. - Hui Chen 016; Zihao Zhang; Peng Chen 027; Xiangzhong Luo; Shiqing Li; Weichen Liu (ACM Trans. Embed. Comput. Syst., 2021)

iMAD: An In-Memory Accelerator for AdderNet with Efficient 8-bit Addition and Subtraction Operations. - Shien Zhu; Shiqing Li; Weichen Liu (ACM Great Lakes Symposium on VLSI, 2022)

EDLAB: A Benchmark for Edge Deep Learning Accelerators. - Hao Kong; Shuo Huai; Di Liu 002; Lei Zhang 072; Hui Chen 016; Shien Zhu; Shiqing Li; Weichen Liu; Manu Rastogi; Ravi Subramaniam; Madhu Athreya; M. Anthony Lewis (IEEE Des. Test, 2022)

MUGNoC: A Software-Configured Multicast-Unicast-Gather NoC for Accelerating CNN Dataflows. - Hui Chen 016; Di Liu 002; Shiqing Li; Shuo Huai; Xiangzhong Luo; Weichen Liu (ASP-DAC, 2023)

Accelerating Gustavson-based SpMM on Embedded FPGAs with Element-wise Parallelism and Access Pattern-aware Caches. - Shiqing Li; Weichen Liu (DATE, 2023)

An Efficient Sparse LSTM Accelerator on Embedded FPGAs with Bandwidth-Oriented Pruning. - Shiqing Li; Shien Zhu; Xiangzhong Luo; Tao Luo 014; Weichen Liu (FPL, 2023)

Model-Based Condition Monitoring of the Sensors and Actuators of an Electric and Automated Vehicle. - Shiqing Li; Michael Frey; Frank Gauterin (Sensors, 2023)

A Comprehensive Memory Management Framework for CPU-FPGA Heterogenous SoCs. - Zelin Du; Qianling Zhang; Mao Lin; Shiqing Li; Xin Li; Lei Ju 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

CRIMP: Compact & Reliable DNN Inference on In-Memory Processing via Crossbar-Aligned Compression and Non-ideality Adaptation. - Shuo Huai; Hao Kong; Xiangzhong Luo; Shiqing Li; Ravi Subramaniam; Christian Makaya; Qian Lin 001; Weichen Liu (ACM Trans. Embed. Comput. Syst., 2023)

An Efficient Gustavson-Based Sparse Matrix-Matrix Multiplication Accelerator on Embedded FPGAs. - Shiqing Li; Shuo Huai; Weichen Liu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Efficient FPGA-Based Sparse Matrix-Vector Multiplication With Data Reuse-Aware Compression. - Shiqing Li; Di Liu 002; Weichen Liu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Pearls Hide Behind Linearity: Simplifying Deep Convolutional Networks for Embedded Hardware Systems via Linearity Grafting. - Xiangzhong Luo; Di Liu 002; Hao Kong; Shuo Huai; Hui Chen 016; Shiqing Li; Guochu Xiong; Weichen Liu (ASPDAC, 2024)

EvoLP: Self-Evolving Latency Predictor for Model Compression in Real-Time Edge Systems. - Shuo Huai; Hao Kong; Shiqing Li; Xiangzhong Luo; Ravi Subramaniam; Christian Makaya; Qian Lin 001; Weichen Liu (IEEE Embed. Syst. Lett., 2024)