Error-free VLSI architecture for the 2-D Daubechies 4-tap filter using algebraic integers. - Shiva Madishetty; Arjuna Madanayake; Renato J. Cintra; Dale H. Mugler; Vassil S. Dimitrov (ISCAS, 2012)

VLSI Architectures for the 4-Tap and 6-Tap 2-D Daubechies Wavelet Filters Using Algebraic Integers. - Shiva Kumar Madishetty; Arjuna Madanayake; Renato J. Cintra; Vassil S. Dimitrov; Dale H. Mugler (IEEE Trans. Circuits Syst. I Regul. Pap., 2013)

Algebraic integer architecture with minimum adder count for the 2-D Daubechies 4-tap filters banks. - Shiva Kumar Madishetty; Arjuna Madanayake; Renato J. Cintra; Vassil S. Dimitrov; Dale H. Mugler (Multidimens. Syst. Signal Process., 2014)

Precise VLSI Architecture for AI Based 1-D/ 2-D Daub-6 Wavelet Filter Banks With Low Adder-Count. - Shiva Kumar Madishetty; Arjuna Madanayake; Renato J. Cintra; Vassil S. Dimitrov (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)