Transistor level gate modeling for accurate and fast timing, noise, and power analysis. - Shiva Raja; F. Varadi; Murat R. Becer; Joao Geada (DAC, 2008)

Systolic Array-based Accelerator for State-Space Models. - Shiva Raja; Cansu Demirkiran; Aakash Sarkar; Milos A. Popovic; Ajay Joshi (CoRR, 2025)