Built-in self testing of high-performance circuits using twisted-ring counters. - Krishnendu Chakrabarty; Shivakumar Swaminathan (ISCAS, 2000)

A deterministic scan-BIST architecture with application to field testing of high-availability systems. - Shivakumar Swaminathan; Krishnendu Chakrabarty (CICC, 2001)

On Using Twisted-Ring Counters for Test Set Embedding in BIST. - Shivakumar Swaminathan; Krishnendu Chakrabarty (J. Electron. Test., 2001)

Scan Data Volume Reduction Using Periodically Alterable MUXs Decompressor. - Yinhe Han 001; Xiaowei Li 001; Shivakumar Swaminathan; Yu Hu 001; Anshuman Chandra (Asian Test Symposium, 2005)

Reducing Power Consumption during TLB Lookups in a PowerPC Embedded Processor. - Shivakumar Swaminathan; Sanjay B. Patel; James Dieffenderfer; Joel Silberman (ISQED, 2005)

Efficient Space/Time Compression to Reduce Test Data Volume and Testing Time for IP Cores. - Lei Li 036; Krishnendu Chakrabarty; Seiji Kajihara; Shivakumar Swaminathan (VLSI Design, 2005)