DRAM cache access optimization leveraging line locking in tag cache: work-in-progress. - Shivani Tripathy; Debiprasanna Sahoo; Manoranjan Satpathy (CASES, 2018)

Post-Model Validation of Victim DRAM Caches. - Debiprasanna Sahoo; Shivani Tripathy; Manoranjan Satpathy; Madhu Mutyam (ICCD, 2019)

Formal Modeling and Verification of NAND Flash Memory Supporting Advanced Operations. - Shivani Tripathy; Debiprasanna Sahoo; Manoranjan Satpathy; Srinivas Pinisetty (ICCD, 2019)

Multidimensional Grid Aware Address Prediction for GPGPU. - Shivani Tripathy; Debiprasanna Sahoo; Manoranjan Satpathy (VLSID, 2019)

Fuzzy fairness controller for NVMe SSDs. - Shivani Tripathy; Debiprasanna Sahoo; Manoranjan Satpathy; Madhu Mutyam (ICS, 2020)

SSD internal cache management policies: A survey. - Shivani Tripathy; Manoranjan Satpathy (J. Syst. Archit., 2022)

Formal Modeling and Verification of Security Properties of a Ransomware-Resistant SSD. - Shivani Tripathy; Debiprasanna Sahoo; Manoranjan Satpathy; Madhu Mutyam (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)