A New Digital Color Image Watermarking Algorithm with its FPGA and ASIC Implementation. - Shivdeep; Sudip Ghosh 001; Hafizur Rahaman 001 (ISDCS, 2020)

A Robust Training Signal Generator for Trainable Memristive Digital to Analog Converter. - Shivdeep; Sahibia Kaur Vohra; Neeraj Goel; Devarshi Mrinal Das (iSES, 2021)

A Low-Overhead PUF Based Hardware Security Technique to Prevent Scan Chain Attacks for Industry-Standard DFT Architecture. - Soniya Chittoriya; Shivdeep; Kundan Kumar Jha; Devarshi Mrinal Das; Rohit Sharma 001 (MWSCAS, 2022)

Full CMOS Circuit for Brain-Inspired Associative Memory With On-Chip Trainable Memristive STDP Synapse. - Sahibia Kaur Vohra; Sherin A. Thomas; Shivdeep; Mahendra Sakare; Devarshi Mrinal Das (IEEE Trans. Very Large Scale Integr. Syst., 2023)

A 66dBΩ 5 GHz and 44.88 √Hz/(pA·pW) Inductorless TIA in 65 nm CMOS. - Azhar Yaseen N. J; Shivdeep; Sahil Sharma; Hitesh Shrimali; Devarshi Mrinal Das (MIXDES, 2024)

A 0.006 mm2 Low Input Capacitance Low Power Fully Differential Neural Amplifier. - Sahil Sharma; Shivdeep; Nidhi Sharma; Devarshi Mrinal Das (MIXDES, 2024)

A Pulse Oximeter and a Controller Designed for Automatic Regulation of Oxygen Concentrators. - Dibya Chowdhury; Shivdeep; Devarshi Mrinal Das (VLSID, 2024)