Interface engineering of Si1-xGex gate stacks for high performance dual channel CMOS. - ChoongHyun Lee; Richard G. Southwick; Shogo Mochizuki; Paul Jamison; Ruqiang Bao; Rajan Kumar Pandey; Aniruddha Konar; Takashi Ando; Vijay Narayanan; Bala Haran; Hemanth Jagannathan (ASICON, 2017)

NBTI Impact of Surface Orientation in Stacked Gate-All-Around Nanosheet Transistor. - Huimei Zhou; Miaomiao Wang 006; Jingyun Zhang; Koji Watanabe; Curtis Durfee; Shogo Mochizuki; Ruqiang Bao; Richard G. Southwick; Maruf Bhuiyan; Basker Veeraraghavan (IRPS, 2020)

A Space-Saving Algorithm for Enumerating Minimal Generators in Negative Rule Mining. - Shogo Mochizuki; Koji Iwanuma (IIAI-AAI, 2024)

Backside Power Distribution for Nanosheet Technologies Beyond 2nm. - Ruilong Xie; Wonhyuk Hong; Chen Zhang; Jongjin Lee; Kevin Brew; Richard Johnson; Nicholas A. Lanzillo; Hosadurga Shobha; Taesun Kim; Panjae Park; Shogo Mochizuki; Iqbal Saraf; et al. (VLSI Technology and Circuits, 2024)