Automatic assertion extraction in gate-level simulation using GPGPUs. - Shohei Ono; Takeshi Matsumoto; Masahiro Fujita (ICCD, 2012)

An efficient method to localize and correct bugs in high-level designs using counterexamples and potential dependence. - Takeshi Matsumoto; Shohei Ono; Masahiro Fujita (VLSI-SoC, 2012)

Partial synthesis through sampling with and without specification. - Masahiro Fujita; Satoshi Jo; Shohei Ono; Takeshi Matsumoto (ICCAD, 2013)