An ECL-compatible GaAs SCFL design method. - Shoichi Shimizu; Kunio Yoshihara; Toshiyuki Terada; Kenji Ishida; Yoshiaki Kitaura; Chiaki Takubo (IEEE J. Solid State Circuits, 1990)

A One-Chip Scalable 8 * 8 ATM Switch LSI Employing Shared Buffer Architecture. - Yasuro Shobatake; Masahiko Motoyama; Emiko Shobatake; Takashi Kamitake; Shoichi Shimizu; Makoto Noda; Kenji Sakaue (IEEE J. Sel. Areas Commun., 1991)

A 0.8- mu m BiCMOS ATM switch on an 800 Mb/s asynchronous buffered banyan network. - Kenji Sakaue; Yasuro Shobatake; Masahiko Motoyama; Yoshinari Kumaki; Satoru Takatsuka; Shigeru Tanaka; Hiroyuki Hara; Kouji Matsuda; Shuji Kitaoka; Makoto Noda; Youichiro Niitsu; Masayuki Norishima; et al. (IEEE J. Solid State Circuits, 1991)

A 10-GHz 8-b multiplexer/demultiplexer chip set for the SONET STS-192 system. - Kenji Ishida; Hirotsugu Wakimoto; Kunio Yoshihara; Mitsuo Konno; Shoichi Shimizu; Yoshiaki Kitaura; Kenichi Tomita; Takashi Suzuki; Naotaka Uchitomi (IEEE J. Solid State Circuits, 1991)

High-speed CMOS I/O buffer circuits. - Manabu Ishibe; Shoji Otaka; Junichi Takeda; Shigeru Tanaka; Yoshiaki Toyoshima; Satoru Takatsuka; Shoichi Shimizu (IEEE J. Solid State Circuits, 1992)

Fast 3D position measurement with two unsynchronized cameras. - Hironobu Fujiyoshi; Shoichi Shimizu; Takayuki Nishi; Yasunori Nagasaka; Tomoichi Takahashi (CIRA, 2003)

A Method of Pseudo Stereo Vision from Images of Cameras Shutter Timing Adjusted. - Hironobu Fujiyoshi; Shoichi Shimizu; Yasunori Nagasaka; Tomoichi Takahashi (RoboCup, 2004)

Robust and Accurate Detection of Object Orientation and ID Without Color Segmentation. - Shoichi Shimizu; Tomoyuki Nagahashi; Hironobu Fujiyoshi (RoboCup, 2005)

Recognition of Road Contours Based on Extraction of 3D Positions of Delineators. - Shoichi Shimizu; Hironobu Fujiyoshi; Hiroshi Sakai; Takeo Kanade (ITSC, 2007)

A 1.6GB/s DDR2 128Mb chain FeRAM with scalable octal bitline and sensing schemes. - Hidehiro Shiga; Daisaburo Takashima; Shinichiro Shiratake; Katsuhiko Hoya; Tadashi Miyakawa; Ryu Ogiwara; Ryo Fukuda; Ryosuke Takizawa; Kosuke Hatsuda; Fumiyoshi Matsuoka; Yasushi Nagadomi; Daisuke Hashimoto; et al. (ISSCC, 2009)

A 1.6 GB/s DDR2 128 Mb Chain FeRAM With Scalable Octal Bitline and Sensing Schemes. - Hidehiro Shiga; Daisaburo Takashima; Shinichiro Shiratake; Katsuhiko Hoya; Tadashi Miyakawa; Ryu Ogiwara; Ryo Fukuda; Ryosuke Takizawa; Kosuke Hatsuda; Fumiyoshi Matsuoka; Yasushi Nagadomi; Daisuke Hashimoto; et al. (IEEE J. Solid State Circuits, 2010)

Acquisition of 3D gaze information from eyeball movements using inside-out camera. - Shoichi Shimizu; Hironobu Fujiyoshi (AH, 2011)

Keypoint Recognition Using Two-Stage Randomized Trees. - Shoichi Shimizu; Hironobu Fujiyoshi (MVA, 2011)

Keypoint Recognition with Two-Stage Randomized Trees. - Shoichi Shimizu; Hironobu Fujiyoshi (IEICE Trans. Inf. Syst., 2012)