A 9-ns 1-Mbit CMOS SRAM. - Katsuro Sasaki; Koichiro Ishibashi; Toshiaki Yamanaka; Naotaka Hashimoto; Takashi Nishida; Katsuhiro Shimohigashi; Shoji Hanamura; Shigeru Honjo (IEEE J. Solid State Circuits, 1989)

VCDS tool demonstration. - Rafael K. Morizawa; Kazuo Tanaka; Keisuke Watanabe; Yuji Kaitsu; Shoji Hanamura; Takao Shinsha; Michiaki Muraoka (ASP-DAC, 2003)