Datapath Generator Based on Gate-Level Symbolic Layout. - Nobu Matsumoto; Yoko Watanabe; Kimiyoshi Usami; Yukio Sugeno; Hiroshi Hatada; Shojiro Mori (DAC, 1990)

Hierarchical symbolic design methodology for large-scale data paths. - Kimiyoshi Usami; Yukio Sugeno; Nobu Matsumoto; Shojiro Mori (IEEE J. Solid State Circuits, 1991)

A Compaction Method for Full Chip VLSI Layouts. - Joseph Dao; Nobu Matsumoto; Tsuneo Hamai; Chusei Ogawa; Shojiro Mori (DAC, 1993)

Embedded tutorial: essential issues for IP reuse. - Daniel Gajski; Allen C.-H. Wu; Viraphol Chaiyakul; Shojiro Mori; Tom Nukiyama; Pierre Bricaud (ASP-DAC, 2000)