Energy evaluation for two-level on-chip cache with non-volatile memory on mobile processors. - Shota Matsuno; Masashi Tawada; Masao Yanagisawa; Shinji Kimura; Nozomu Togawa; Tadahiko Sugibayashi (ASICON, 2013)

Reducing Writing Energy Consumption for Non-Volatile Registers Utilizing Frequent Patterns of Sequential Bits on RISC-V Architecture. - Shota Matsuno; Masashi Tawada; Nozomu Togawa (ICCE, 2021)

Effect of Vibration Behavior in Low-Frequency Vibration Cutting on Surface Properties of Workpiece. - Hiroyuki Kodama; Shota Matsuno; Naoyuki Shibata; Kazuhito Ohashi (Int. J. Autom. Technol., 2023)