Detailed placement for modern FPGAs using 2D dynamic programming. - Shounak Dhar; Saurabh N. Adya; Love Singhal; Mahesh A. Iyer; David Z. Pan (ICCAD, 2016)

Optical computing on silicon-on-insulator-based photonic integrated circuits. - Zheng Zhao 003; Zheng Wang 036; Zhoufeng Ying; Shounak Dhar; Ray T. Chen; David Z. Pan (ASICON, 2017)

An Effective Timing-Driven Detailed Placement Algorithm for FPGAs. - Shounak Dhar; Mahesh A. Iyer; Saurabh N. Adya; Love Singhal; Nikolay Rubanov; David Z. Pan (ISPD, 2017)

Logic synthesis for energy-efficient photonic integrated circuits. - Zheng Zhao 003; Zheng Wang 036; Zhoufeng Ying; Shounak Dhar; Ray T. Chen; David Z. Pan (ASP-DAC, 2018)

GDP: GPU accelerated Detailed Placement. - Shounak Dhar; David Z. Pan (HPEC, 2018)

UTPlaceF: A Routability-Driven FPGA Placer With Physical and Congestion Aware Packing. - Wuxi Li; Shounak Dhar; David Z. Pan (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

UTPlaceF 2.0: A High-Performance Clock-Aware FPGA Placement Engine. - Wuxi Li; Yibo Lin; Meng Li 004; Shounak Dhar; David Z. Pan (ACM Trans. Design Autom. Electr. Syst., 2018)

A shape-driven spreading algorithm using linear programming for global placement. - Shounak Dhar; Love Singhal; Mahesh A. Iyer; David Z. Pan (ASP-DAC, 2019)

DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement. - Yibo Lin; Shounak Dhar; Wuxi Li; Haoxing Ren; Brucek Khailany; David Z. Pan (DAC, 2019)

FPGA Accelerated FPGA Placement. - Shounak Dhar; Love Singhal; Mahesh A. Iyer; David Z. Pan (FPL, 2019)

FPGA-Accelerated Spreading for Global Placement. - Shounak Dhar; Love Singhal; Mahesh A. Iyer; David Z. Pan (HPEC, 2019)

DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement. - Yibo Lin; Zixuan Jiang; Jiaqi Gu 002; Wuxi Li; Shounak Dhar; Haoxing Ren; Brucek Khailany; David Z. Pan (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)