Inter-Tier Process Variation-Aware Monolithic 3D NoC Architectures. - Shouvik Musavvir; Anwesha Chatterjee; Ryan Gary Kim; Dae Hyun Kim 004; Partha Pratim Pande (CoRR, 2019)

Power, Performance, and Thermal Trade-offs in M3D-enabled Manycore Chips. - Shouvik Musavvir; Anwesha Chatterjee; Ryan Gary Kim; Dae Hyun Kim 004; Janardhan Rao Doppa; Partha Pratim Pande (DATE, 2020)

Inter-Tier Process-Variation-Aware Monolithic 3-D NoC Design Space Exploration. - Shouvik Musavvir; Anwesha Chatterjee; Ryan Gary Kim; Dae Hyun Kim 004; Partha Pratim Pande (IEEE Trans. Very Large Scale Integr. Syst., 2020)

Power Management of Monolithic 3D Manycore Chips with Inter-tier Process Variations. - Anwesha Chatterjee; Shouvik Musavvir; Ryan Gary Kim; Janardhan Rao Doppa; Partha Pratim Pande (ACM J. Emerg. Technol. Comput. Syst., 2021)