Designing 3D test wrappers for pre-bond and post-bond test of 3D embedded cores. - Dean L. Lewis; Shreepad Panth; Xin Zhao 001; Sung Kyu Lim; Hsien-Hsin S. Lee (ICCD, 2011)

Scan chain and power delivery network synthesis for pre-bond test of 3D ICs. - Shreepad Panth; Sung Kyu Lim (VTS, 2011)

TSV Stress-Aware ATPG for 3D Stacked ICs. - Sergej Deutsch; Krishnendu Chakrabarty; Shreepad Panth; Sung Kyu Lim (Asian Test Symposium, 2012)

3D-MAPS: 3D Massively parallel processor with stacked memory. - Dae Hyun Kim 004; Krit Athikulwongse; Michael B. Healy; Mohammad M. Hossain; Moongon Jung; Ilya Khorosh; Gokul Kumar; Young-Joon Lee; Dean L. Lewis; Tzu-Wei Lin; Chang Liu 034; Shreepad Panth; et al. (ISSCC, 2012)

Scan test of die logic in 3D ICs using TSV probing. - Brandon Noia; Shreepad Panth; Krishnendu Chakrabarty; Sung Kyu Lim (ITC, 2012)

Transition delay fault testing of 3D ICs with IR-drop study. - Shreepad Panth; Sung Kyu Lim (VTS, 2012)

Test-TSV estimation during 3D-IC partitioning. - Shreepad Panth; Kambiz Samadi; Sung Kyu Lim (3DIC, 2013)

High-density integration of functional modules using monolithic 3D-IC technology. - Shreepad Panth; Kambiz Samadi; Yang Du 001; Sung Kyu Lim (ASP-DAC, 2013)

IsoNet: Hardware-Based Job Queue Management for Many-Core Architectures. - Junghee Lee; Chrysostomos Nicopoulos; Hyung Gyu Lee; Shreepad Panth; Sung Kyu Lim; Jongman Kim (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Power-Performance Study of Block-Level Monolithic 3D-ICs Considering Inter-Tier Performance Variations. - Shreepad Panth; Kambiz Samadi; Yang Du 001; Sung Kyu Lim (DAC, 2014)

Fast and Accurate Thermal Modeling and Optimization for Monolithic 3D ICs. - Sandeep Kumar Samal; Shreepad Panth; Kambiz Samadi; Mehdi Saedi; Yang Du 001; Sung Kyu Lim (DAC, 2014)

Design and CAD methodologies for low power gate-level monolithic 3D ICs. - Shreepad A. Panth; Kambiz Samadi; Yang Du 001; Sung Kyu Lim (ISLPED, 2014)

Design Challenges and Solutions for Ultra-High-Density Monolithic 3D ICs. - Shreepad Panth; Sandeep Kumar Samal; Yun Seop Yu; Sung Kyu Lim (J. Inform. and Commun. Convergence Engineering, 2014)

Tier-partitioning for power delivery vs cooling tradeoff in 3D VLSI for mobile applications. - Shreepad Panth; Kambiz Samadi; Yang Du 001; Sung Kyu Lim (DAC, 2015)

Three-Tier 3D ICs for More Power Reduction: Strategies in CAD, Design, and Bonding Selection. - Taigon Song; Shreepad Panth; Yoo-Jin Chae; Sung Kyu Lim (ICCAD, 2015)

Design and Analysis of 3D-MAPS (3D Massively Parallel Processor with Stacked Memory). - Daehyun Kim 004; Krit Athikulwongse; Michael B. Healy; Mohammad M. Hossain; Moongon Jung; Ilya Khorosh; Gokul Kumar; Young-Joon Lee; Dean L. Lewis; Tzu-Wei Lin; Chang Liu 034; Shreepad Panth; et al. (IEEE Trans. Computers, 2015)

Placement-Driven Partitioning for Congestion Mitigation in Monolithic 3D IC Designs. - Shreepad Panth; Kambiz Samadi; Yang Du 001; Sung Kyu Lim (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

Scan Test of Die Logic in 3-D ICs Using TSV Probing. - Brandon Noia; Shreepad Panth; Krishnendu Chakrabarty; Sung Kyu Lim (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Physical design methodologies for monolithic 3D ICs. - Shreepad Panth (2015)

Monolithic 3D IC design: Power, performance, and area impact at 7nm. - Kartik Acharya; Kyungwook Chang; Bon Woong Ku; Shreepad Panth; Saurabh Sinha; Brian Cline; Greg Yeric; Sung Kyu Lim (ISQED, 2016)

Adaptive Regression-Based Thermal Modeling and Optimization for Monolithic 3-D ICs. - Sandeep Kumar Samal; Shreepad Panth; Kambiz Samadi; Mehdi Saedi; Yang Du 001; Sung Kyu Lim (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

More Power Reduction With 3-Tier Logic-on-Logic 3-D ICs. - Taigon Song; Shreepad Panth; Yoo-Jin Chae; Sung Kyu Lim (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

Shrunk-2-D: A Physical Design Methodology to Build Commercial-Quality Monolithic 3-D ICs. - Shreepad Panth; Kambiz Samadi; Yang Du 001; Sung Kyu Lim (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

Tier Degradation of Monolithic 3-D ICs: A Power Performance Study at Different Technology Nodes. - Shreepad Panth; Sandeep Kumar Samal; Kambiz Samadi; Yang Du 001; Sung Kyu Lim (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)