Rule-Based Power-Balanced VLIW Instruction Scheduling with Uncertainty. - Shu Xiao 001; Edmund Ming-Kit Lai; A. Benjamin Premkumar (Asia-Pacific Computer Systems Architecture Conference, 2005)

Instruction scheduling of VLIW architectures for balanced power consumption. - Shu Xiao 001; Edmund Ming-Kit Lai (ASP-DAC, 2005)

A rough programming approach to power-aware VLIW instruction scheduling for digital signal processors. - Shu Xiao 001; Edmund Ming-Kit Lai (ICASSP (5), 2005)

VLIW instruction scheduling for DSP processors based on rough set theory. - Shu Xiao 001; Edmund Ming-Kit Lai; A. Prasad Vinod 001 (ISSPA, 2005)

Power-balanced instruction scheduling for pipelined VLIW architectures - Shu Xiao 001 (2006)

VLIW instruction scheduling for minimal power variation. - Shu Xiao 001; Edmund Ming-Kit Lai (ACM Trans. Archit. Code Optim., 2007)

A Rough Programming Approach to Power-Balanced Instruction Scheduling for VLIW Digital Signal Processors. - Shu Xiao 001; Edmund Ming-Kit Lai (IEEE Trans. Signal Process., 2008)