Measuring Text Readability by Lexical Relations Retrieved from Wordnet. - Shu-Yen Lin; Cheng-Chao Su; Yu-Da Lai; Li-Chin Yang; Shu-Kai Hsieh (ROCLING, 2008)

Traffic-balanced IP mapping algorithm for 2D-mesh On-Chip-Networks. - Ting-Jung Lin; Shu-Yen Lin; An-Yeu Wu (SiPS, 2008)

Traffic-Balanced Routing Algorithm for Irregular Mesh-Based On-Chip Networks. - Shu-Yen Lin; Chun-Hsiang Huang; Chih-Hao Chao; Keng-Hsien Huang; An-Yeu Wu (IEEE Trans. Computers, 2008)

A Scalable Built-in Self-test/Self-diagnosis Architecture for 2D-Mesh based Chip Multiprocessor Systems. - Shu-Yen Lin; Chan-Cheng Hsu; An-Yeu Wu (ISCAS, 2009)

Assessing Text Readability Using Hierarchical Lexical Relations Retrieved from WordNet. - Shu-Yen Lin; Cheng-Chao Su; Yu-Da Lai; Li-Chin Yang; Shu-Kai Hsieh (Int. J. Comput. Linguistics Chin. Lang. Process., 2009)

Annotating Phonetic Component of Chinese Characters Using Constrained Optimization and Pronunciation Distribution. - Chia-Hui Chang; Shu-Yen Lin; Shu-Ying Li; Meng-Feng Tsai; Shu-Ping Li; Hsiang-Mei Liao; Chih-Wen Sun; Norden E. Huang (Int. J. Comput. Linguistics Chin. Lang. Process., 2010)

聲符部件排序與形聲字發音規則探勘 (Pronunciation Rules Discovery for Picto-Phonetic Chinese Characters) [In Chinese]. - Chia-Hui Chang; Shu-Yen Lin (ROCLING, 2011)

Transport Layer Assisted Routing for Non-Stationary Irregular mesh of thermal-aware 3D Network-on-Chip systems. - Chih-Hao Chao; Tsu-Chu Yin; Shu-Yen Lin; An-Yeu Wu (SoCC, 2011)

Multi-Pheromone ACO-based routing in Network-on-Chip system inspired by economic phenomenon. - Hsien-Kai Hsin; En-Jui Chang; Chih-Hao Chao; Shu-Yen Lin; An-Yeu Wu (SoCC, 2011)

A scalable built-in self-recovery (BISR) VLSI architecture and design methodology for 2D-mesh based on-chip networks. - Kun-Chih Chen; Shu-Yen Lin; Wen-Chung Shen; An-Yeu Wu (Des. Autom. Embed. Syst., 2011)

Traffic-Balanced Topology-Aware Multiple Routing Adjustment for Throttled 3D NOC Systems. - Kun-Chih Chen; Shu-Yen Lin; Hui-Shun Hung; An-Yeu Wu (SiPS, 2012)

Transport-layer assisted vertical traffic balanced routing for thermal-aware three-dimensional Network-on-Chip systems. - Kun-Chih Chen; Chih-Hao Chao; Shu-Yen Lin; Hui-Shun Hung; An-Yeu Wu (VLSI-DAT, 2012)

Phonetic Component Ranking and Pronunciation Rules Discovery for Picto-Phonetic Chinese Characters. - Chia-Hui Chang; Shu-Yen Lin; Meng-Feng Tsai; Shu-Ping Li; Hsiang-Mei Liao; Norden E. Huang (Int. J. Comput. Linguistics Chin. Lang. Process., 2012)

Design of thermal management unit with vertical throttling scheme for proactive thermal-aware 3D NoC systems. - Kun-Chih Chen; Shu-Yen Lin; An-Yeu Wu (VLSI-DAT, 2013)

Transport-layer-assisted routing for runtime thermal management of 3D NoC systems. - Chih-Hao Chao; Kun-Chih Chen; Tsu-Chu Yin; Shu-Yen Lin; An-Yeu Wu (ACM Trans. Embed. Comput. Syst., 2013)

Topology-Aware Adaptive Routing for Nonstationary Irregular Mesh in Throttled 3D NoC Systems. - Kun-Chih Chen; Shu-Yen Lin; Hui-Shun Hung; An-Yeu Andy Wu (IEEE Trans. Parallel Distributed Syst., 2013)

Chinese Open Relation Extraction for Knowledge Acquisition. - Yuen-Hsien Tseng; Lung-Hao Lee; Shu-Yen Lin; Bo-Shun Liao; Mei-Jun Liu; Hsin-Hsi Chen; Oren Etzioni; Anthony Fader (EACL, 2014)

Thermal-aware architecture and mapping for multi-channel three-dimensional DRAM systems. - Shu-Yen Lin; Jin-Yi Lin (GCCE, 2014)

Thermal-aware kernel mapping for three-dimensional multi-mode channel decoding. - Shu-Yen Lin; Cheng-Hung Lin; Ho-Yun Su (GCCE, 2014)

Ultra-low complexity early termination scheme for layered LDPC decoding. - Yuan-Syun Wu; Cheng-Hung Lin; Shu-Yen Lin (GCCE, 2014)

Path-Congestion-Aware Adaptive Routing With a Contention Prediction Scheme for Network-on-Chip Systems. - En-Jui Chang; Hsien-Kai Hsin; Shu-Yen Lin; An-Yeu Wu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014)

DArT: A Component-Based DRAM Area, Power, and Timing Modeling Tool. - Hsiu-Chuan Shih; Pei-Wen Luo; Jen-Chieh Yeh; Shu-Yen Lin; Ding-Ming Kwai; Shih-Lien Lu; Andre Schaefer; Cheng-Wen Wu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014)

An enhanced single-binary turbo decoding scheme for turbo MIMO systems. - Cheng-Hung Lin; Chih-Hsuan Chiang; Shu-Wei Quo; Shu-Yen Lin (GCCE, 2015)

Real-time data compression for thermal-controlled three-dimensional DRAM systems. - Shu-Yen Lin; Jin-Yi Lin; Kai-Wei Chang; Cheng-Hung Huang (GCCE, 2015)

Block-based SRAM architecture and thermal-aware memory mappings for three-dimensional channel decoding systems. - Shu-Yen Lin; Cheng-Hung Lin; Ho-Yun Su (GCCE, 2015)

Regional ACO-Based Cascaded Adaptive Routing for Traffic Balancing in Mesh-Based Network-on-Chip Systems. - En-Jui Chang; Hsien-Kai Hsin; Chih-Hao Chao; Shu-Yen Lin; An-Yeu Andy Wu (IEEE Trans. Computers, 2015)

A reconfigurable near-data systolic array accelerator for the three-dimensional DRAM systems. - Shu-Yen Lin; Jin-Yi Lin; Cheng-Hung Lin (GCCE, 2016)

Partially-stopped probabilistic min-sum algorithm for LDPC decoding. - Chen-Pei Song; Cheng-Hung Lin; Shu-Yen Lin (GCCE, 2016)

Disease checking method of ECG signals with variable output resolutions for wearable devices. - Shu-Yen Lin; Hao-Te Lin (GCCE, 2017)

Thermal- and Performance-Aware Address Mapping for the Multi-Channel Three-Dimensional DRAM Systems. - Shu-Yen Lin; Jin-Yi Lin (IEEE Access, 2017)

Design and Implementation of Operation-Reduced LDPC Decoder Based on a Check Node Stopping Scheme. - Cheng-Hung Lin; Tzu-Hsuan Huang; Shu-Yen Lin; Yu-Hsuan Lee (J. Circuits Syst. Comput., 2017)

The Video Spatial Error Concealment Algorithm Using Separately-Directional Interpolation Technique. - Yu-Hsuan Lee; Cheng-Hung Lin; Chao-Chyun Chen; Shu-Yen Lin; Bo-Siang Huang (J. Signal Process. Syst., 2017)

Dynamic Thermal-Aware Inter-Layer Perpendicular Downward Mapping for Three-Dimensional Convolutional Neural Network Accelerator. - Shu-Yen Lin; Jin-Yi Lin (GCCE, 2019)

Non-contact Heart Rate Monitoring with Mobile Phone Camera. - Shu-Yen Lin; Meng-Ru Tsai (ICCE-TW, 2019)

Reconfigurable MAC Systolic Array Architecture Design for Three-Dimensional Convolution Neural Network. - Shu-Yen Lin; Kuan-Han Lin; Chun-Kuan Tsai; Po-Hsiang Tseng (ICCE-TW, 2020)

Correction to: the Video Spatial Error Concealment Algorithm Using Separately-Directional Interpolation Technique. - Yu-Hsuan Lee; Cheng-Hung Lin; Chao-Chyun Chen; Shu-Yen Lin; Bo-Siang Huang (J. Signal Process. Syst., 2020)

The Corpus of Emotional Valences for 33, 669 Chinese Words Based on Big Data. - Chia-Yueh Chang; Yen-Cheng Chen; Meng-Ning Tsai; Yao-Ting Sung; Yu-Lin Chang; Shu-Yen Lin; Shu-Ling Cho; Tao-Hsing Chang; Hsueh-Chih Chen (HCI (26), 2022)

Building a "Corpus of 7 Types Emotion Co-occurrences Words" of Chinese Emotional Words with Big Data Corpus. - Ching-Hui Chen; Yu-Lin Chang; Yen-Cheng Chen; Meng-Ning Tsai; Yao-Ting Sung; Shu-Yen Lin; Shu-Ling Cho; Tao-Hsing Chang; Hsueh-Chih Chen (HCI (26), 2022)

Dynamic Thermal-Predicted Workload Movement with Three-Dimensional DRAM-RRAM Hybrid Memories for Convolutional Neural Network Applications. - Shu-Yen Lin; Guang-Fong Liu (ICCE-TW, 2022)

Thermal-constrained memory management for three-dimensional DRAM-PCM memory with deep neural network applications. - Shu-Yen Lin; Shao-Cheng Wang (Microprocess. Microsystems, 2022)

Object-Location Prediction based on CIE Color Difference for Deep Reinforcement Learning. - Kuan-Yi Li; Shu-Yen Lin (GCCE, 2023)

Multi-Mode AI Accelerator Architecture for Thermal-Aware 3D Stacked Deep Neural Network Design. - Hari Chandhana Varma M; Advaidh Swaminathan; Shu-Yen Lin (ICCE-Taiwan, 2023)

Low-area architecture design of multi-mode activation functions with controllable maximum absolute error for neural network applications. - Shu-Yen Lin; Jung-Chuan Chiang (Microprocess. Microsystems, 2023)

Temperature-Prediction Based Rate-Adjusted Time and Space Mapping Algorithm for 3D CNN Accelerator Systems. - Jin-Yi Lin; Shu-Yen Lin (IEEE Trans. Computers, 2023)

Systolic Array-Based Accelerator Architecture Combining Iterative Variable-Width Approximate Multipliers. - Po-Ying Feng; Shih-Nung Lee; Yong-Chi Chang; Hsuan-Yu Chiang; Shu-Yen Lin (GCCE, 2024)

A Low-area Hardware and Architecture Design of Truncation- and Rounding-Based Approximate Multiplier for Artificial Intelligence Applications. - Chieh-Wei Wu; Li-Chieh Wang; Wei-Xun Chen; Yu-Xiang Hong; Shu-Yen Lin (ICCE-Taiwan, 2024)

Dynamic Precision-Scalable Thermal Mapping Algorithm for Three Dimensional Systolic-Array Based Neural Network Accelerator. - Shu-Yen Lin; Chun-Kuan Tsai; Wen-Chun Kao (IEEE Trans. Consumer Electron., 2024)