On Minimizing Analog Variation Errors to Resolve the Scalability Issue of ReRAM-Based Crossbar Accelerators. - Yao-Wen Kang; Chun-Feng Wu; Yuan-Hao Chang 001; Tei-Wei Kuo; Shu-Yin Ho (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Binarized SNNs: Efficient and Error-Resilient Spiking Neural Networks through Binarization. - Ming-Liang Wei; Mikail Yayla; Shu-Yin Ho; Jian-Jia Chen; Chia-Lin Yang; Hussam Amrouch (ICCAD, 2021)

Reliable Brain-inspired AI Accelerators using Classical and Emerging Memories. - Mikail Yayla; Simon Thomann; Md. Mazharul Islam 006; Ming-Liang Wei; Shu-Yin Ho; Ahmedullah Aziz; Chia-Lin Yang; Jian-Jia Chen; Hussam Amrouch (VTS, 2023)

Impact of Non-Volatile Memory Cells on Spiking Neural Network Annealing Machine With In-Situ Synapse Processing. - Ming-Liang Wei; Mikail Yayla; Shu-Yin Ho; Jian-Jia Chen; Hussam Amrouch; Chia-Lin Yang (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)