Learning-based interconnect-aware dataflow accelerator optimization. - Shuangnan Liu; Benjamin Carrión Schäfer (FPL, 2017)

Investigation and Optimization of Pin Multiplexing in High-Level Synthesis. - Shuangnan Liu; Francis C. M. Lau 002; Benjamin Carrión Schäfer (ACM Great Lakes Symposium on VLSI, 2018)

Accelerating FPGA Prototyping through Predictive Model-Based HLS Design Space Exploration. - Shuangnan Liu; Francis C. M. Lau 002; Benjamin Carrión Schäfer (DAC, 2019)

Design space exploration of heterogeneous MPSoCs with variable number of hardware accelerators. - Siyuan Xu; Shuangnan Liu; Yidi Liu; Anushree Mahapatra; Monica Villaverde; Félix Moreno; Benjamin Carrión Schäfer (Microprocess. Microsystems, 2019)

Predictive Compositional Method to Design and Reoptimize Complex Behavioral Dataflows. - Shuangnan Liu; Francis C. M. Lau 002; Benjamin Carrión Schäfer (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)