A 40nm 33.6Tops/W 8T-SRAM Computing-in-Memory Macro with DAC-less Spike-Pulse-Truncation Input and ADC-less Charge-Reservoir-Integrate-Counter Output. - He Zhang 011; Junzhan Liu; Wang Kang 001; Yunqian Fan; Shufeng Fu; Jinyu Bai; Biao Pan; Yongpan Liu; Weisheng Zhao (ICTA, 2021)