A 2-V 3.7-mW delay locked-loop using recycling integrator correlators for a 5-Mcps DS-CDMA demodulator. - Yoshihisa Fujimoto; Shuichi Kawama; Kunihiko Iizuka; Masayuki Miyamoto; Daniel Senderowicz (CICC, 2000)

Embedded anti-aliasing in switched-capacitor ladder filters. - Daniel Senderowicz; Shin'ichiro Azuma; Shuichi Kawama; Kunihiko Iizuka; Masayuki Miyamoto (CICC, 2001)

CDMA functional blocks using recycling integrator correlators-matched filters and delay-locked loops. - Kunihiko Iizuka; Masayuki Miyamoto; Yoshiji Ohta; Takahiro Suyama; Keita Hara; Shuichi Kawama; Hirofumi Matsui; Shin'ichiro Azuma; Shigenari Taguchi; Yoshihisa Fujimoto; Daniel Senderowicz (IEEE J. Solid State Circuits, 2001)

Embedded anti-aliasing in switched-capacitor ladder filters with variable gain and offset compensation. - Shin'ichiro Azuma; Shuichi Kawama; Kunihiko Iizuka; Masayuki Miyamoto; Daniel Senderowicz (IEEE J. Solid State Circuits, 2002)

Fast Automatic Tuning of Channel Selection Filters Based on Phase Delay Calibration. - Koutani Kagoshima; Shuichi Kawama; Shinji Toyoyama; Kunihiko Iizuka (CICC, 2006)

A Digital TV Receiver RF and BB Chipset with Adaptive Bias-Current Control for Mobile Applications. - Takae Sakai; Shinya Ito; Nobuyoshi Kaiki; Atsushi Sakai; Mamoru Okazaki; Masayuki Natsumi; Akira Saito; Kazumasa Kioi; Masato Koutani; Koutani Kagoshima; Shuichi Kawama; Hiroshi Kijima; et al. (ISSCC, 2007)

A 184 mW Fully Integrated DVB-H Tuner With a Linearized Variable Gain LNA and Quadrature Mixers Using Cross-Coupled Transconductor. - Kunihiko Iizuka; Hiroshi Kawamura; Takanobu Fujiwara; Kanetomo Kagoshima; Shuichi Kawama; Hiroshi Kijima; Masato Koutani; Shinji Toyoyama; Keiichi Sakuno (IEEE J. Solid State Circuits, 2007)