FPGA based realization of a reduced complexity high speed decoder for error correction. - Shuja Ahmad Abbasi (ICECS, 2003)

Realization of algorithm for the computation of third-order cross moments using FPGA. - Syed Manzoor Qasim; Saleh A. Alshebeili; Ateeq A. Khan; Shuja Ahmad Abbasi (ISSPA, 2007)

A Novel FPGA-Based Approach for Digital Waveform Generation Using Orthogonal Functions. - Syed Manzoor Qasim; Shuja Ahmad Abbasi (J. Circuits Syst. Comput., 2007)

A proposed FPGA-based parallel architecture for matrix multiplication. - Syed Manzoor Qasim; Shuja Ahmad Abbasi; Bandar Almashary (APCCAS, 2008)

A novel VLSI architecture for a fuzzy inference processor using Gaussian-shaped membership function. - Sajad A. Loan; Asim M. Murshid; Shuja A. Abbasi; Abdul Rahman M. Alamoud (J. Intell. Fuzzy Syst., 2013)

Interconnect optimization to enhance the performance of subthreshold circuits. - S. D. Pable; Mohd. Hasan; Shuja A. Abbasi; Abdul Rahman M. Alamoud (Microelectron. J., 2013)

High performance charge plasma based multi zone lateral bipolar junction transistor. - Sajad A. Loan; Faisal Bashir; M. Rafat; Shuja A. Abbasi; Abdul Rahman M. Alamoud (ICM, 2014)

FPGA design, simulation and prototyping of a high speed 32-bit pipeline multiplier based on Vedic mathematics. - Shuja Ahmad Abbasi; Zulhelmi; Abdul Rahman M. Alamoud (IEICE Electron. Express, 2015)