Parasitic capacitance modeling for multilevel interconnects. - Sadahiro Tani; Yoshihiro Uchida; Makoto Furuie; Shuji Tsukiyama; BuYeol Lee; Shuji Nishi; Yasushi Kubota; Isao Shirakawa; Shigeki Imai (APCCAS (1), 2002)

Parasitic Capacitance Modeling for Non-Planar Interconnects in Liquid Crystal Displays. - Sadahiro Tani; Yoshihiro Uchida; Makoto Furuie; Shuji Tsukiyama; BuYeol Lee; Shuji Nishi; Yasushi Kubota; Isao Shirakawa; Shigeki Imai (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003)

An automatic layout method for timing pulse generator of small LCD driver. - Shohei Asakawa; Shuji Tsukiyama; Isao Shirakawa; Shuji Nishi; Tadashi Takeda; Tomoyuki Nagai; Yasushi Kubota (ECCTD, 2011)