A Novel Charge Pump with Ultra-Low Current Mismatch and Variation for PLL. - Shujiang Ji; Yuxiao Zhao; Wenjie Xu; Na Yan; Hao Min (ISCAS, 2020)

A 7.9-14.3GHz -243.3dB FoMT Sub-Sampling PLL with Transformer-Based Dual-Mode VCO in 40nm CMOS. - Yizhuo Wang; Tenghao Zou; Bowen Chen; Shujiang Ji; Chao Zhang; Na Yan (A-SSCC, 2021)

A novel method to improve the subcarrier frequency accuracy for UHF RFID sensing system. - Kuanfeng Tang; Chao Zhang; Maodong Wang; Shengliang Xu; Shujiang Ji; Na Yan; Hao Min; Jin Mitsugi (RFID, 2021)

A Highly Integrated Passive Wireless Sensing System With Synchronized Data Streaming of Multiple Tags. - Kuanfeng Tang; Maodong Wang; Meng Liu; Chao Zhang; Shengliang Xu; Shujiang Ji; Sijia Lai; Na Yan; Hao Min; Jin Mitsugi (IEEE Internet Things J., 2022)

Analysis and Design of a Dual-Mode VCO With Inherent Mode Compensation Enabling a 7.9-14.3-GHz 85-fs-rms Jitter PLL. - Yizhuo Wang; Jiahe Shi; Hao Xu 005; Shujiang Ji; Yiyun Mao; Tenghao Zou; Jun Tao 001; Hao Min; Na Yan (IEEE J. Solid State Circuits, 2023)

Analysis and Design of a Sub-Sampling PLL of Low Phase Noise and Low Reference Spur. - Hao Xu 005; Shujiang Ji; Yizhuo Wang; Xinyi Lin; Hao Min; Na Yan (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)