Bridging the Gap between Design and Verification of Embedded Systems in Model Based System Engineering: A Meta-model for Modeling Universal Verification Methodology (UVM) Test Benches. - Muhammad Waseem Anwar; Shumaila Qamar; Farooque Azam; Wasi Haider Butt; Muhammad Rashid 001 (ICCMS, 2020)

A Comprehensive Investigation of Universal Verification Methodology (UVM) Standard for Design Verification. - Shumaila Qamar; Wasi Haider Butt; Muhammad Waseem Anwar; Farooque Azam; Muhammad Qasim Khan (ICSCA, 2020)