A single-chip MPEG-2 codec based on customizable media microprocessor. - Shunichi Ishiwata; Tomoo Yamakage; Yoshiro Tsuboi; Takayoshi Shimazawa; Tomoko Kitazawa; Shuji Michinaka; Kunihiko Yahagi; Hideki Takeda; Akihiro Oue; Tomoya Kodama; Nobu Matsumoto; Takayuki Kamei; et al. (CICC, 2002)

A single-chip MPEG-2 codec based on customizable media embedded processor. - Shunichi Ishiwata; Tomoo Yamakage; Yoshiro Tsuboi; Takayoshi Shimazawa; Tomoko Kitazawa; Shuji Michinaka; Kunihiko Yahagi; Hideki Takeda; Akihiro Oue; Tomoya Kodama; Nobu Matsumoto; Takayuki Kamei; et al. (IEEE J. Solid State Circuits, 2003)

Complexity Based Fast Coding Mode Decision for MPEG-2 / H.264 Video Transcoding. - Shen Li; Lingfeng Li; Takeshi Ikenaga; Shunichi Ishiwata; Masataka Matsui; Satoshi Goto (APCCAS, 2006)

Content-Based Complexity Reduction Methods for MPEG-2 to H.264 Transcoding. - Shen Li; Lingfeng Li; Takeshi Ikenaga; Shunichi Ishiwata; Masataka Matsui; Satoshi Goto (IEICE Trans. Inf. Syst., 2007)

Side Match Distortion based Adaptive Error Concealment order for 1Seg Video Broadcasting Application. - Jun Wang 015; Yichun Tang; Shen Li; Shunichi Ishiwata; Satoshi Goto (ISCAS, 2009)

HDTV1080p H.264/AVC Encoder Chip Design and Performance Analysis. - Zhenyu Liu 001; Yang Song 002; Ming Shao; Shen Li; Lingfeng Li; Shunichi Ishiwata; Masaki Nakagawa; Satoshi Goto; Takeshi Ikenaga (IEEE J. Solid State Circuits, 2009)

A VLIW Vector Media Coprocessor With Cascaded SIMD ALUs. - Takahisa Wada; Shunichi Ishiwata; Katsuyuki Kimura; Keiri Nakanishi; Masato Sumiyoshi; Takashi Miyamori; Masaki Nakagawa (IEEE Trans. Very Large Scale Integr. Syst., 2009)