Microprogramming Design support System. - Akihiko Yamada; Akihiro Kawaguchi; Kazutoshi Takahashi; Shunichi Kato (DAC, 1974)

MIXS: A mixed level simulator for large digital system logic verification. - Tohru Sasaki; Akihiko Yamada; Shunichi Kato; Terufumi Nakazawa; Kyoji Tomita; Nobuyoshi Nomizu (DAC, 1980)

Hierarchical design verification for large digital systems. - Tohru Sasaki; Akihiko Yamada; Toshinori Aoyama; Katsutoshi Hasegawa; Shunichi Kato; Shinichi Sato (DAC, 1981)

A High Level Test Pattern Generation Algorithm. - Masato Kawai; Hideo Shibano; Shigehiro Funatsu; Shunichi Kato; T. Kurobe; K. Ookawa; Tohru Sasaki (ITC, 1983)

Logic Design Verification Using Automated Test Generation. - Tohru Sasaki; Shunichi Kato; Nobuyoshi Nomizu; Hidetoshi Tanaka (ITC, 1984)