Error-resilient sequential cells with successive time borrowing for stochastic computing. - Wei-Chang Liu; Ching-Da Chan; Shuo-An Huang; Chi-Wei Lo; Chia-Hsiang Yang; Shyh-Jye Jou (ICASSP, 2016)

A 2×2-16×16 Reconfigurable GGMD Processor for MIMO Communication Systems. - Chih-Hsuan Chiang; Shuo-An Huang; Chiao-En Chen; Chia-Hsiang Yang (ISCAS, 2018)

A 1.9MW SVM Processor with On-Chip Active Learning for Epileptic Seizure Control. - Shuo-An Huang; Kai-Chieh Chang; Horng-Huei Liou; Chia-Hsiang Yang (VLSI Circuits, 2018)

A Hardware-Efficient ADMM-Based SVM Training Algorithm for Edge Computing. - Shuo-An Huang; Chia-Hsiang Yang (CoRR, 2019)

A 1.9-mW SVM Processor With On-Chip Active Learning for Epileptic Seizure Control. - Shuo-An Huang; Kai-Chieh Chang; Horng-Huei Liou; Chia-Hsiang Yang (IEEE J. Solid State Circuits, 2020)

Design optimization for ADMM-Based SVM Training Processor for Edge Computing. - Shuo-An Huang; Yi-Yen Hsieh; Chia-Hsiang Yang (AICAS, 2021)