Performance Evaluation of Circuit Switched Multistage Interconnection Networks Using a Hold Strategy. - Shuo-Hsien Hsiao; C. Y. Roger Chen (IEEE Trans. Parallel Distributed Syst., 1992)

A New Model for the Performance Evaluation of Synchronous Circuit Switched Multistage Interconnection Networks. - Shuo-Hsien Hsiao; C. Y. Roger Chen (IPPS, 1993)

Performance analysis of single-buffered multistage interconnection networks. - Shuo-Hsien Hsiao; C. Y. Roger Chen (IEEE Trans. Commun., 1994)

A new model for the performance evaluation of synchronous circuit switched multistage interconnection networks. - C. Y. Roger Chen; Shuo-Hsien Hsiao; Abdulaziz S. Almazyad (IEEE/ACM Trans. Netw., 1995)