Augmented Memory Computing: Dynamically Augmented SRAM Storage for Data Intensive Applications. - Haripriya Sheshadri; Shwetha Vijayakumar; Ajey P. Jacob; Akhilesh R. Jaiswal (CoRR, 2021)

A 9 Transistor SRAM Featuring Array-level XOR Parallelism with Secure Data Toggling Operation. - Zihan Yin; Annewsha Datta; Shwetha Vijayakumar; Ajey P. Jacob; Akhilesh Jaiswal 001 (ACM Great Lakes Symposium on VLSI, 2024)