Conception et réalisation d'un processeur pour une architecture cellulaire massivement parallèle intégrée. (VLSI design and implementation of a processor for an integrated massivelly parallel cellular architecture). - Si Mahmoud Karabernou (1992)

RAP: a Fine Grain MIMD Machine. - Chouki Aktouf; Si Mahmoud Karabernou; Youssef Latrous; Guy Mazaré (PARCO, 1993)

An effective resolution definition or how to choose an edge detector, its scale parameter and the threshold? - Didier Demigny; Si Mahmoud Karabernou (ICIP (1), 1996)

Reconfigurable Architecture Using High Speed FPGA. - Lounis Kessal; R. Bourguiba; Didier Demigny; N. Boudouani; Si Mahmoud Karabernou (VLSI-SOC, 2001)

Two ASIC for Low and Middle Levels of Real Time Image Processing. - P. Lamaty; B. Mazar; Didier Demigny; Lounis Kessal; Si Mahmoud Karabernou (VLSI-SOC, 2001)

Real-time FPGA implementation of Hough Transform using gradient and CORDIC algorithm. - Si Mahmoud Karabernou; Fayçal Terranti (Image Vis. Comput., 2005)

Erratum to "Real-time FPGA implementation of Hough Transform using gradient and CORDIC algorithm" [Image and Vision Computing 23 (2005) 1009-1017]. - Si Mahmoud Karabernou; Lounis Kessal; Fayçal Terranti (Image Vis. Comput., 2007)

Reconfigurable computing: design methodology and hardware tasks scheduling for real-time image processing. - Lounis Kessal; Nicolas Abel; Si Mahmoud Karabernou; Didier Demigny (J. Real Time Image Process., 2008)

FPGA-implementation of a bio-inspired medical hearing aid based DWT-OLA. - Lotfi Bendaouia; Hassen Salhi; Si Mahmoud Karabernou; Lounis Kessal; Fayçal Ykhlef (ICAILP, 2014)