A 4.8-bit ENOB 5-bit 500MS/s binary-search ADC with minimized number of comparators. - Si-Seng Wong; U. Fat Chio; Chi-Hang Chan; Hou-Lon Choi; Sai-Weng Sin; Seng-Pan U; Rui Paulo Martins (A-SSCC, 2011)

A 2.3mW 10-bit 170MS/s two-step binary-search assisted time-interleaved SAR ADC. - Si-Seng Wong; U-Fat Chio; Yan Zhu 001; Sai-Weng Sin; Seng-Pan U.; Rui Paulo Martins (CICC, 2012)

A 2.3 mW 10-bit 170 MS/s Two-Step Binary-Search Assisted Time-Interleaved SAR ADC. - Si-Seng Wong; U-Fat Chio; Yan Zhu 001; Sai-Weng Sin; Seng-Pan U; Rui Paulo Martins (IEEE J. Solid State Circuits, 2013)

Histogram-Based Ratio Mismatch Calibration for Bridge-DAC in 12-bit 120 MS/s SAR ADC. - Yan Zhu 001; Chi-Hang Chan; Si-Seng Wong; Seng-Pan U; Rui Paulo Martins (IEEE Trans. Very Large Scale Integr. Syst., 2016)