Optimal Instruction Scheduling for a Class of Vector Processors: an Integer Programming Approach. - Siamak Arya (1983)

An Optimal Instruction-Scheduling Model for a Class of Vector Processors. - Siamak Arya (IEEE Trans. Computers, 1985)

Parallel algorithm development workbench. - Siamak Arya; Blaine Gaither (SC, 1988)

An architecture for high instruction level parallelism. - Siamak Arya; Howard Sachs; Sreeram Duvvuru (HICSS (1), 1995)

Evaluation of a branch target address cache. - Sreeram Duvvuru; Siamak Arya (HICSS (1), 1995)