FPGA Based High Performance Double-Precision Matrix Multiplication. - Vinay B. Y. Kumar; Siddharth Joshi 005; Sachin B. Patkar; H. Narayanan (Int. J. Parallel Program., 2010)

Double Precision Sparse Matrix Vector Multiplication Accelerator on FPGA. - Sumedh Attarde; Siddharth Joshi 005; Yash Deshpande; Sunil Puranik; Sachin B. Patkar (PECCS, 2011)