Tiny neural network search and implementation for embedded FPGA: a software-hardware co-design approach. - Jinyu Bai; Yunqian Fan; Sifan Sun; Wang Kang 001; Weisheng Zhao (A-SSCC, 2021)

Hierarchical Non-Structured Pruning for Computing-In-Memory Accelerators with Reduced ADC Resolution Requirement. - Wenlu Xue; Jinyu Bai; Sifan Sun; Wang Kang 001 (DATE, 2023)

Exploring Bit-Level Sparsity for Partial Sum Quantization in Computing-In-Memory Accelerator. - Jinyu Bai; Sifan Sun; Wang Kang 001 (NVMSA, 2023)

An In-Memory-Computing STT-MRAM Macro with Analog ReLU and Pooling Layers for Ultra-High Efficient Neural Network. - Linjun Jiang; Sifan Sun; Jinming Ge; He Zhang 011; Wang Kang 001 (NVMSA, 2023)

ES-MPQ: Evolutionary Search Enabled Mixed Precision Quantization Framework for Computing-in-Memory. - Sifan Sun; Jinming Ge; Jinyu Bai; Wang Kang 001 (NVMSA, 2023)

Partial Sum Quantization for Computing-In-Memory-Based Neural Network Accelerator. - Jinyu Bai; Wenlu Xue; Yunqian Fan; Sifan Sun; Wang Kang 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

CIMQ: A Hardware-Efficient Quantization Framework for Computing-In-Memory-Based Neural Network Accelerators. - Jinyu Bai; Sifan Sun; Weisheng Zhao; Wang Kang 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

CIM²PQ: An Arraywise and Hardware-Friendly Mixed Precision Quantization Method for Analog Computing-In-Memory. - Sifan Sun; Jinyu Bai; Zhaoyu Shi; Weisheng Zhao; Wang Kang 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

A 24.65 TOPS/W@INT8 Hybrid Analog-Digital Multi-core SRAM CIM Macro with Optimal Weight Dividing and Resource Allocation Strategies. - Yitong Zhou; Wente Yi; Sifan Sun; Wenjia Wang; Jinyu Bai; He Zhang 011; Wang Kang 001 (ASP-DAC, 2025)

In-MRAM Computing Based on Complementary-Sensing Time-Based Readout Circuit Using Hybrid VGSOT-MTJ/GAA-CNTFET. - Zhongzhen Tong; Sifan Sun; Kaili Zhang; Chenghang Li; Daming Zhou; Zhaohao Wang; Xiaoyang Lin; Weisheng Zhao (IEEE Trans. Circuits Syst. II Express Briefs, 2025)