New model-driven design and generation of multi-facet arbiters part I: from the design model to the architecture model. - Jer-Min Jou; Sih-Sian Wu; Yun-Lung Lee; Cheng Chou; Yuan-Long Jeang (DAC, 2010)

Efficient design and generation of a multi-facet arbiter. - Jer-Min Jou; Yun-Lung Lee; Sih-Sian Wu (SASP, 2010)

Model-Driven Design and Generation of New Multi-Facet Arbiters: From the Design Model to the Hardware Synthesis. - Jer-Min Jou; Yun-Lung Lee; Sih-Sian Wu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

A thermal resilient integration of many-core microprocessors and main memory by 2.5D TSI I/Os. - Sih-Sian Wu; Kanwen Wang; Sai Manoj Pudukotai Dinakarrao; Tsung-Yi Ho; Mingbin Yu; Hao Yu 001 (DATE, 2014)

Memory efficient architecture for belief propagation based disparity estimation. - Sih-Sian Wu; Hong-Hui Chen; Chen-Han Tsai; Liang-Gee Chen (ISCAS, 2015)

23.2 A 1920×1080 30fps 611 mW five-view depth-estimation processor for light-field applications. - Hong-Hui Chen; Chao-Tsung Huang; Sih-Sian Wu; Chia-Liang Hung; Tsung-Chuan Ma; Liang-Gee Chen (ISSCC, 2015)

3-D perception enhancement in autostereoscopic TV by depth cue for 3-D model interaction. - Yi-Ting Shen; Guan-Lin Liu; Sih-Sian Wu; Liang-Gee Chen (ICCE, 2016)

Efficient Hardware Architecture for Large Disparity Range Stereo Matching Based on Belief Propagation. - Sih-Sian Wu; Chen-Han Tsai; Liang-Gee Chen (SiPS, 2016)

Accurate and fast segment-based cost aggregation algorithm for stereo matching. - Da-Fang Chang; Sih-Sian Wu; Hsin-Yu Hou; Liang-Gee Chen (MMSP, 2017)

Video Stereo Matching with Temporally Consistent Belief Propagation. - Hsin-Yu Hou; Sih-Sian Wu; Da-Fang Chang; Liang-Gee Chen (ICME, 2018)

Accurate and Bandwidth Efficient Architecture for CNN-based Full-HD Super-Resolution. - Chung-Yan Chih; Sih-Sian Wu; Jan P. Klopp; Liang-Gee Chen (ISCAS, 2018)

Joint Pruning & Quantization for Extremely Sparse Neural Networks. - Po-Hsiang Yu; Sih-Sian Wu; Jan P. Klopp; Liang-Gee Chen; Shao-Yi Chien (CoRR, 2020)

A Computational Efficient Architecture for Extremely Sparse Stereo Network. - Tan Huang; Sih-Sian Wu; Jan Klopp; Po-Hsiang Yu; Liang-Gee Chen (ISCAS, 2021)

Online Training Refinement Network and Architecture Design for Stereo Matching. - Yu-Sheng Wu; Sih-Sian Wu; Tan Huang; Liang-Gee Chen (ISCAS, 2021)

KCP: Kernel Cluster Pruning for Dense Labeling Neural Networks. - Po-Hsiang Yu; Sih-Sian Wu; Liang-Gee Chen (CoRR, 2021)

CMWMF: Constant Memory Architecture of Weighted Mode/Median Filter for Extremely Large Label Depth Refinement. - Sih-Sian Wu; Liang-Gee Chen (IEEE Trans. Circuits Syst. Video Technol., 2021)

Hardware- and Memory-Efficient Architecture for Disparity Estimation of Large Label Counts. - Sih-Sian Wu; Hon-Hui Chen; Liang-Gee Chen (IEEE Trans. Circuits Syst. Video Technol., 2021)