Single-ended disturb-free 5T loadless SRAM Cell using 90 nm CMOS process. - Sih-Yu Chen; Chua-Chin Wang (ICICDT, 2012)

A single-ended disturb-free 5T loadless SRAM with leakage sensor and read delay compensation using 40 nm CMOS process. - Chua-Chin Wang; Chiang-Hsiang Liao; Sih-Yu Chen (ISCAS, 2014)

A Leakage Compensation Design for Low Supply Voltage SRAM. - Chua-Chin Wang; Deng-Shian Wang; Chiang-Hsiang Liao; Sih-Yu Chen (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Text-Mining Application on CSR Report Analytics: A Study of Petrochemical Industry. - Sheng-Hung Liu; Sih-Yu Chen; Sheng-Tun Li (IIAI-AAI, 2017)