Wafer-scale Computing: Advancements, Challenges, and Future Perspectives. - Yang Hu 001; Xinhan Lin; Huizheng Wang; Zhen He; Xingmao Yu; Jiahao Zhang; Qize Yang; Zheng Xu; Sihan Guan; Jiahao Fang; Haoran Shang; Xinru Tang; et al. (CoRR, 2023)

SOFA: A Compute-Memory Optimized Sparsity Accelerator via Cross-Stage Coordinated Tiling. - Huizheng Wang; Jiahao Fang; Xinru Tang; Zhiheng Yue; Jinxi Li; Yubin Qin; Sihan Guan; Qinze Yang; Yang Wang 089; Chao Li 009; Yang Hu 001; Shouyi Yin (MICRO, 2024)

SOFA: A Compute-Memory Optimized Sparsity Accelerator via Cross-Stage Coordinated Tiling. - Huizheng Wang; Jiahao Fang; Xinru Tang; Zhiheng Yue; Jinxi Li; Yubin Qin; Sihan Guan; Qize Yang; Yang Wang 089; Chao Li 009; Yang Hu 001; Shouyi Yin (CoRR, 2024)

PD Constraint-aware Physical/Logical Topology Co-Design for Network on Wafer. - Qize Yang; Taiquan Wei; Sihan Guan; Chengran Li; Haoran Shang; Jinyi Deng; Huizheng Wang; Chao Li 009; Lei Wang; Yan Zhang; Shouyi Yin; Yang Hu 001 (ISCA, 2025)